Datasheet · 2020

TI LM74700-Q1 Low-IQ Reverse Battery Protection Ideal Diode Controller — Datasheet (SNOSD17G)

Ideal-diode pair for a two-source supply (WP-3 alternative).

Author: Texas Instruments
Year: 2020
Type: Datasheet
Credit: Texas Instruments (ti.com)

ideal diode controller
oring

LM74700-Q1 LM74700-Q1 SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 www.ti.com LM74700-Q1 Low IQ Reverse Battery Protection Ideal Diode Controller 1 Features 3 Description • The LM74700-Q1 is an automotive AEC Q100 qualified ideal diode controller which operates in conjunction with an external N-channel MOSFET as an ideal diode rectifier for low loss reverse polarity protection with a 20-mV forward voltage drop. The wide supply input range of 3.2 V to 65 V allows control of many popular DC bus voltages such as 12-V, 24-V and 48-V automotive battery systems. The 3.2-V input voltage support is particularly well suited for severe cold crank requirements in automotive systems. The device can withstand and protect the loads from negative supply voltages down to –65 V. • • • • • • • • • • • • AEC-Q100 qualified with the following results – Device temperature grade 1: –40°C to +125°C ambient operating temperature range – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B Functional Safety-Capable – Documentation available to aid functional safety system design 3.2-V to 65-V input range (3.9-V start up) –65-V reverse voltage rating Charge pump for external N-Channel MOSFET 20-mV ANODE to CATHODE forward voltage drop regulation Enable pin feature 1-µA shutdown current (EN=Low) 80-µA operating quiescent current (EN=High) 2.3-A peak gate turnoff current Fast response to reverse current blocking: < 0.75 µs Meets automotive ISO7637 transient requirements with a suitable TVS Diode Available in 6-pin and 8-pin SOT-23 Package 2.90 mm × 1.60 mm 2 Applications • • • • • Automotive ADAS systems - camera Automotive infotainment systems - digital cluster, head unit Industrial factory automation - PLC Enterprise power supplies Active ORing for redundant power The device controls the GATE of the MOSFET to regulate the forward voltage drop at 20 mV. The regulation scheme enables graceful turn off of the MOSFET during a reverse current event and ensures zero DC reverse current flow. Fast response (< 0.75 µs) to Reverse Current Blocking makes the device suitable for systems with output voltage holdup requirements during ISO7637 pulse testing as well as power fail and input micro-short conditions. The LM74700-Q1 controller provides a charge pump gate drive for an external N-channel MOSFET. The high voltage rating of LM74700-Q1 helps to simplify the system designs for automotive ISO7637 protection. With the enable pin low, the controller is off and draws approximately 1 µA of current. Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) LM74700-Q1 SOT-23 (6) 2.90 mm × 1.60 mm LM74700-Q1 SOT-23 (8) 2.90 mm × 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. VOUT VOUT VBATT VGATE Voltage Regulator TVS ANODE GATE VBATT CATHODE VCAP LM74700 EN GND IBATT ON OFF Typical Application Schematic Reverse Current Blocking During Input Short An© 2020 IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, Copyright Texas Instruments Incorporated Submit Document Feedback intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION Product Folder Links: LM74700-Q1 DATA. 1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 5 6.1 Absolute Maximum Ratings........................................ 5 6.2 ESD Ratings............................................................... 5 6.3 Recommended Operating Conditions.........................5 6.4 Thermal Information....................................................6 6.5 Electrical Characteristics.............................................6 6.6 Switching Characteristics............................................7 7 Typical Characteristics................................................... 8 8 Parameter Measurement Information.......................... 11 9 Detailed Description......................................................12 9.1 Overview................................................................... 12 9.2 Functional Block Diagram......................................... 12 9.3 Feature Description...................................................13 9.4 Device Functional Modes..........................................15 10 Application and Implementation................................ 16 10.1 Application Information........................................... 16 10.2 OR-ing Application Configuration............................22 11 Power Supply Recommendations..............................22 12 Layout...........................................................................23 12.1 Layout Guidelines................................................... 23 12.2 Layout Example...................................................... 24 13 Device and Documentation Support..........................25 13.1 Receiving Notification of Documentation Updates..25 13.2 Support Resources................................................. 25 13.3 Trademarks............................................................. 25 13.4 Electrostatic Discharge Caution..............................25 13.5 Glossary..................................................................25 14 Mechanical, Packaging, and Orderable Information.................................................................... 25 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision F (December 2019) to Revision G (December 2020) Page • Updated the numbering format for tables, figures and cross-references throughout the document...................1 • Added DDF (SOT-23) package option to data sheet.......................................................................................... 1 • Relaxed VCAP specs in Electrical Characteristics table.................................................................................... 5 Changes from Revision E (February 2019) to Revision F (December 2019) Page • Added the Functional safety capable link to the Features section......................................................................1 Changes from Revision D (January 2019) to Revision E (February 2019) Page • Changed from Advance Information to Production Data ................................................................................... 1 Changes from Revision C (November 2018) to Revision D (January 2019) Page • Added Typical Characteristics section ............................................................................................................... 8 • Added Parameter Measurement Information section .......................................................................................11 • Deleted Application Limitations section ........................................................................................................... 22 • Added Or-ing Application Configuration section .............................................................................................. 22 Changes from Revision B (October 2018) to Revision C (November 2018) Page • Added footnotes to the Absolute Maximum Ratings and Recommended Operating Conditions tables in the Specifications section......................................................................................................................................... 5 Changes from Revision A (March 2018) to Revision B (October 2018) Page • Changes made in the Specifications and Application Limitations sections........................................................ 1 Changes from Revision * (October 2017) to Revision A (March 2018) Page • Multiple changes made throughout Data Sheet..................................................................................................1 2 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 5 Pin Configuration and Functions VCAP 1 6 ANODE GND 2 5 GATE EN 3 4 CATHODE Figure 5-1. DBV Package 6-Pin SOT-23 Top View Table 5-1. Pin Functions PIN I/O(1) DESCRIPTION NO. NAME 1 VCAP O Charge pump output. Connect to external charge pump capacitor 2 GND G Ground pin 3 EN I Enable pin. Can be connected to ANODE for always ON operation 4 CATHODE I Cathode of the diode. Connect to the drain of the external N-channel MOSFET 5 GATE O Gate drive output. Connect to gate of the external N-channel MOSFET 6 ANODE I Anode of the diode and input power. Connect to the source of the external N-channel MOSFET (1) I = Input, O = Output, G = GND Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 3 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 EN 1 8 CATHODE GND 2 7 N.C N.C 3 6 GATE VCAP 4 5 ANODE Figure 5-2. DDF Package 8-Pin SOT-23 Top View Table 5-2. Pin Functions PIN I/O(1) DESCRIPTION NO. NAME 1 EN I Enable pin. Can be connected to ANODE for always ON operation 2 GND G Ground pin 3 N.C 4 VCAP No connection O Charge pump output. Connect to external charge pump capacitor 5 ANODE I Anode of the diode and input power. Connect to the source of the external N-channel MOSFET 6 GATE O Gate drive output. Connect to gate of the external N-channel MOSFET 7 N.C 8 CATHODE (1) I = Input, O = Output, G = GND 4 Submit Document Feedback No connection I Cathode of the diode. Connect to the drain of the external N-channel MOSFET Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) ANODE to GND Input Pins MIN MAX UNIT –65 65 V EN to GND, V(ANODE) > 0 V –0.3 65 V EN to GND, V(ANODE) ≤ 0 V V(ANODE) (65 + V(ANODE)) V GATE to ANODE –0.3 15 V VCAP to ANODE –0.3 15 V –5 75 V Operating junction temperature(2) –40 150 °C Storage temperature, Tstg –40 150 °C Output Pins Output to Input Pins (1) (2) CATHODE to ANODE Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C. 6.2 ESD Ratings VALUE Human body model (HBM), per AEC Q100-002(1) V(ESD) (1) Electrostatic discharge Charged device model (CDM), per AEC Q100-011 UNIT ±2000 Corner pins (VCAP, EN, ANODE, CATHODE) ±750 Other pins ±500 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted)(1) MIN ANODE to GND Input Pins Input to Output pins –60 CATHODE to GND NOM MAX 60 60 EN to GND –60 ANODE to CATHODE –70 UNIT V 60 V ANODE 22 nF CATHODE, VCAP to ANODE 0.1 µF External MOSFET max VGS rating GATE to ANODE 15 V TJ Operating junction temperature range(2) –40 External capacitance (1) (2) 150 °C Recommended Operating Conditions are conditions under which the device is intended to be functional. For specifications and test conditions, see Electrical Characteristics. High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C. Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 5 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 6.4 Thermal Information LM74700-Q1 LM74700-Q1 DBV (SOT) DDF (SOT) 6 PINS 8 PINS THERMAL METRIC(1) UNIT RθJA Junction-to-ambient thermal resistance 189.8 133.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 103.8 72.6 °C/W RθJB Junction-to-board thermal resistance 45.8 54.5 °C/W ΨJT Junction-to-top characterization parameter 19.4 4.6 °C/W ΨJB Junction-to-board characterization parameter 45.5 54.2 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics TJ = –40°C to +125°C; typical values at TJ = 25°C, V(ANODE) = 12 V, C(VCAP) = 0.1 µF, V(EN) = 3.3 V, over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 60 V 3.9 V VANODE SUPPLY VOLTAGE V(ANODE) V(ANODE POR) V(ANODE POR(Hys)) Operating input voltage 4 VANODE POR Rising threshold VANODE POR Falling threshold 2.2 VANODE POR Hysteresis 0.44 I(SHDN) Shutdown Supply Current I(Q) Operating Quiescent Current V(EN) = 0 V 2.8 3.1 V 0.67 V 0.9 1.5 µA 80 130 µA ENABLE INPUT V(EN_IL) Enable input low threshold 0.5 0.9 1.22 V(EN_IH) Enable input high threshold 1.06 2 2.6 V(EN_Hys) Enable Hysteresis 0.52 I(EN) Enable sink current V(EN) = 12 V V 1.35 V 3 5 µA VANODE to VCATHODE V(AK REG) Regulated Forward V(AK) Threshold 13 20 29 mV V(AK) V(AK) threshold for full conduction mode 34 50 57 mV V(AK REV) V(AK) threshold for reverse current blocking –17 –11 –2 mV Gm Regulation Error AMP Transconductance(1) 1200 1800 3100 µA/V 3 11 mA 2370 mA 26 µA GATE DRIVE I(GATE) RDSON Peak source current V(ANODE) – V(CATHODE) = 100 mV, V(GATE) – V(ANODE) = 5 V Peak sink current V(ANODE) – V(CATHODE) = –20 mV, V(GATE) – V(ANODE) = 5 V Regulation max sink current V(ANODE) – V(CATHODE) = 0 V, V(GATE) – V(ANODE) = 5 V discharge switch RDSON V(ANODE) – V(CATHODE) = –20 mV, V(GATE) – V(ANODE) = 100 mV 6 0.4 2 Ω CHARGE PUMP 6 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 6.5 Electrical Characteristics (continued) TJ = –40°C to +125°C; typical values at TJ = 25°C, V(ANODE) = 12 V, C(VCAP) = 0.1 µF, V(EN) = 3.3 V, over operating free-air temperature range (unless otherwise noted) PARAMETER I(VCAP) V(VCAP) – V(ANODE) V(VCAP UVLO) TEST CONDITIONS Charge Pump source current (Charge pump on) V(VCAP) – V(ANODE) = 7 V Charge Pump sink current (Charge pump off) V(VCAP) – V(ANODE) = 14 V Charge pump voltage at V(ANODE) = 3.2 V I(VCAP) ≤ 30 µA MIN TYP MAX UNIT 162 300 600 µA 5 10 µA 8 V Charge pump turn on voltage 10.8 12.1 12.9 V Charge pump turn off voltage 11.6 13 13.9 V Charge Pump Enable comparator Hysteresis 0.54 0.9 1.36 V V(VCAP) – V(ANODE) UV release at rising V(ANODE) – V(CATHODE) = 100 mV edge 5.8 6.6 7.7 V V(VCAP) – V(ANODE) UV threshold at falling edge 5.11 5.68 6 V 1.7 2 µA V(ANODE) – V(CATHODE) = 100 mV CATHODE I(CATHODE) (1) V(ANODE) = 12 V, V(ANODE) – V(CATHODE) = –100 mV CATHODE sink current V(ANODE) – V(CATHODE) = –100 mV 1.2 2.2 µA V(ANODE) = –12 V, V(CATHODE) = 12 V 1.25 2.06 µA Parameter guaranteed by design and characterization 6.6 Switching Characteristics TJ = –40°C to +125°C; typical values at TJ = 25°C, V(ANODE) = 12 V, C(VCAP) = 0.1 µF, V(EN) = 3.3 V, over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 75 110 µs ENTDLY Enable (low to high) to Gate Turn On delay V(VCAP) > V(VCAP UVLOR) tReverse delay Reverse voltage detection to Gate Turn Off delay V(ANODE) – V(CATHODE) = 100 mV to –100 mV 0.45 0.75 µs tForward recovery Forward voltage detection to Gate Turn On delay V(ANODE) – V(CATHODE) = –100 mV to 700 mV 1.4 2.6 µs Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 7 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 7 Typical Characteristics lQ (PA) ISHDN (PA) 6.5 6 5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -40qC 25qC 85qC 125qC 150qC 0 5 10 15 20 25 30 35 40 45 50 55 60 65 VANODE (V) D001 1.8 16 1.6 14 1.4 12 1.2 10 8 -40qC 25qC 85qC 125qC 150qC 4 2 5 10 15 20 25 30 35 40 45 50 55 60 65 VANODE (V) D005 Figure 7-2. Operating Quiescent Current vs Supply Voltage 18 6 1 0.8 0.6 -40qC 25qC 85qC 125qC 150qC 0.4 0.2 0 0 0 10 20 30 40 50 60 VANODE = VEN (V) 70 0 10 20 30 40 VANODE (V) D002 Figure 7-3. Enable Sink Current vs Supply Voltage 50 60 70 D007 Figure 7-4. CATHODE Sink Current vs Supply Voltage 500 350 -40qC 25qC 85qC 125qC 150qC 450 Charge Pump Current (PA) 300 Charge Pump Current (PA) -40qC 25qC 85qC 125qC 150qC 0 ICATHODE (PA) IEN (PA) Figure 7-1. Shutdown Supply Current vs Supply Voltage 250 200 150 -40qC 25qC 85qC 125qC 150qC 100 50 400 350 300 250 200 150 100 0 50 3 4.5 6 7.5 VANODE (V) 9 10.5 12 0 D012 Figure 7-5. Charge Pump Current vs Supply Voltage at VCAP = 6V 8 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 2 4 6 VCAP (V) 8 10 12 D013 Figure 7-6. Charge Pump V-I Characteristics at VANODE > = 12 V Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 7 Typical Characteristics (continued) 1.2 225 Charge Pump Current (PA) 175 150 Enable Falling Threshold (V) -40qC 25qC 85qC 125qC 150qC 200 125 100 75 50 1 0.8 0.6 0.4 0.2 25 0 -50 0 0 1 2 3 4 5 VCAP (V) 6 7 8 9 D025 Figure 7-7. Charge Pump V-I Characteristics at VANODE = 3.2 V 50 100 Temperature (qC) 150 200 D014 Figure 7-8. Enable Falling Threshold vs Temperature 0.5 2.06 2.04 0.49 Forward Recovery Delay (Ps) Reverse Recovery Delay (Ps) 0 0.48 0.47 0.46 0.45 0.44 2.02 2 1.98 1.96 1.94 1.92 1.9 1.88 0.43 -50 0 50 100 Temperature (qC) 150 1.86 -50 200 Figure 7-9. Reverse Current Blocking Delay vs Temperature 150 200 D024 Charge Pump ON/OFF Threshold (V) 13 80 Enable to Gate Delay (Ps) 50 100 Temperature (qC) Figure 7-10. Forward Recovery Delay vs Temperature 90 70 60 50 40 30 20 ENTDLY ON ENTDLY OFF 10 0 -50 0 D015 0 50 100 Temperature (qC) 150 200 12.8 12.6 12.4 12.2 12 11.8 11.6 -50 D018 Figure 7-11. Enable to Gate Delay vs Temperature VCAP OFF VCAP ON 0 50 100 Temperature (qC) 150 200 D019 Figure 7-12. Charge Pump ON/OFF Threshold vs Temperature Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 9 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 7 6.5 6 5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 3.5 VANODE POR Thresholds (V) Charge Pump UVLO Threshold (V) 7 Typical Characteristics (continued) VCAP UVLOR VCAP UVLOF -25 0 25 50 75 100 125 Temperature (qC) 150 175 3 2.5 2 1.5 1 0.5 0 -50 200 VANODE PORR VANODE PORF 0 50 100 Temperature (qC) D020 Figure 7-13. Charge Pump UVLO Threshold vs Temperature 150 200 D021 Figure 7-14. VANODE POR Threshold vs Temperature 100 80 60 IGATE (PA) 40 20 0 -20 -40 -60 -80 -100 -20 IGATE 0 20 40 VANODE-VCATHODE (mV) 60 D022 Figure 7-15. Gate Current vs Forward Voltage Drop 10 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 8 Parameter Measurement Information VEN 3.3 V 0V VGATE ± VANODE VGATE 90% 0V VGATE ± VANODE VANODE ± VCATHODE tENTDLYt 100 mV VANODE > VCATHODE 0 mV VCATHODE > VANODE -100 mV VGATE 10% 0V VANODE ± VCATHODE tTREVERSE DELAYt 700 mV VANODE > VCATHODE 0 mV -100 mV VCATHODE > VANODE VGATE ± VANODE VGATE 90% 0V tTFWD_RECOVERYt Figure 8-1. Timing Waveforms Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 11 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 9 Detailed Description 9.1 Overview The LM74700-Q1 ideal diode controller has all the features necessary to implement an efficient and fast reverse polarity protection circuit or be used in an ORing configuration while minimizing the number of external components. This easy to use ideal diode controller is paired with an external N-channel MOSFET to replace other reverse polarity schemes such as a P-channel MOSFET or a Schottky diode. An internal charge pump is used to drive the external N-Channel MOSFET to a maximum gate drive voltage of approximately 15 V. The voltage drop across the MOSFET is continuously monitored between the ANODE and CATHODE pins, and the GATE to ANODE voltage is adjusted as needed to regulate the forward voltage drop at 20 mV. This closed loop regulation scheme enables graceful turn off of the MOSFET during a reverse current event and ensures zero DC reverse current flow. A fast reverse current condition is detected when the voltage across ANODE and CATHODE pins reduces below –11 mV , resulting in the GATE pin being internally connected to the ANODE pin turning off the external N-channel MOSFET, and using the body diode to block any of the reverse current. An enable pin, EN is available to place the LM74700-Q1 in shutdown mode disabling the N-Channel MOSFET and minimizing the quiescent current. 9.2 Functional Block Diagram ANODE CATHODE GATE VANODE VCAP COMPARATOR + ± + ± Bias Rails 50 mV GM AMP + ± + ± GATE DRIVER ENABLE LOGIC 20 mV COMPARATOR + ± S Q R Q VANODE ENGATE VANODE VCAP_UV VCAP_UV + ± -11 mV VANODE VANODE Charge Pump Charge Pump Enable Logic VCAP ENABLE LOGIC VCAP_UV REVERSE PROTECTION LOGIC VCAP VCAP EN GND Copyright © 2017, Texas Instruments Incorporated 12 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 9.3 Feature Description 9.3.1 Input Voltage The ANODE pin is used to power the LM74700-Q1's internal circuitry, typically drawing 80 µA when enabled and 1 µA when disabled. If the ANODE pin voltage is greater than the POR Rising threshold, then LM74700-Q1 operates in either shutdown mode or conduction mode in accordance with the EN pin voltage. The voltage from ANODE to GND is designed to vary from 65 V to –65 V, allowing the LM74700-Q1 to withstand negative voltage transients. 9.3.2 Charge Pump The charge pump supplies the voltage necessary to drive the external N-channel MOSFET. An external charge pump capacitor is placed between VCAP and ANODE pins to provide energy to turn on the external MOSFET. In order for the charge pump to supply current to the external capacitor the EN pin voltage must be above the specified input high threshold, V(EN_IH). When enabled the charge pump sources a charging current of 300-µA typical. If EN pins is pulled low, then the charge pump remains disabled. To ensure that the external MOSFET can be driven above its specified threshold voltage, the VCAP to ANODE voltage must be above the undervoltage lockout threshold, typically 6.6 V, before the internal gate driver is enabled. Use Equation 1 to calculate the initial gate driver enable delay. T DRV _ EN 75Ps C(VCAP) x V(VCAP _ UVLOR) 300PA (1) where • • C(VCAP) is the charge pump capacitance connected across ANODE and VCAP pins V(VCAP_UVLOR) = 6.6 V (typical) . To remove any chatter on the gate drive approximately 900 mV of hysteresis is added to the VCAP undervoltage lockout. The charge pump remains enabled until the VCAP to ANODE voltage reaches 13 V, typically, at which point the charge pump is disabled decreasing the current draw on the ANODE pin. The charge pump remains disabled until the VCAP to ANODE voltage is below to 12.1 V typically at which point the charge pump is enabled. The voltage between VCAP and ANODE continue to charge and discharge between 12.1 V and 13 V as shown in Figure 9-1. By enabling and disabling the charge pump, the operating quiescent current of the LM74700-Q1 is reduced. When the charge pump is disabled it sinks 5-µA typical. Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 13 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 TDRV_EN TON TOFF VIN VANODE 0V VEN 13 V 12.1 V VCAP-VANODE 6.6 V V(VCAP UVLOR) GATE DRIVER ENABLE Figure 9-1. Charge Pump Operation 9.3.3 Gate Driver The gate driver is used to control the external N-Channel MOSFET by setting the GATE to ANODE voltage to the corresponding mode of operation. There are three defined modes of operation that the gate driver operates under forward regulation, full conduction mode and reverse current protection, according to the ANODE to CATHODE voltage. Forward regulation mode, full conduction mode and reverse current protection mode are described in more detail in the Regulated conduction Mode, Full Conduction Mode and Reverse Current Production Mode sections. Figure 9-2 depicts how the modes of operation vary according to the ANODE to CATHODE voltage of the LM74700-Q1. The threshold between forward regulation mode and conduction mode is when the ANODE to CATHODE voltage is 50 mV. The threshold between forward regulation mode and reverse current protection mode is when the ANODE to CATHODE voltage is –11 mV. Reverse Current Protection Mode GATE connected to ANODE -11 mV Full Conduction Mode Regulated Conduction Mode GATE connected to VCAP GATE to ANODE Voltage Regulated 0 mV 20 mV VANODE ± VCATHODE 50 mV Figure 9-2. Gate Driver Mode Transitions Before the gate driver is enabled following three conditions must be achieved: • The EN pin voltage must be greater than the specified input high voltage. • The VCAP to ANODE voltage must be greater than the undervoltage lockout voltage. • The ANODE voltage must be greater than VANODE POR Rising threshold. 14 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 If the above conditions are not achieved, then the GATE pin is internally connected to the ANODE pin, assuring that the external MOSFET is disabled. Once these conditions are achieved the gate driver operates in the correct mode depending on the ANODE to CATHODE voltage. 9.3.4 Enable The LM74700-Q1 has an enable pin, EN. The enable pin allows for the gate driver to be either enabled or disabled by an external signal. If the EN pin voltage is greater than the rising threshold, the gate driver and charge pump operates as described in Gate Driver and Charge Pump sections. If the enable pin voltage is less than the input low threshold, the charge pump and gate driver are disabled placing the LM74700-Q1 in shutdown mode. The EN pin can withstand a voltage as large as 65 V and as low as –65 V. This allows for the EN pin to be connected directly to the ANODE pin if enable functionality is not needed. In conditions where EN is left floating, the internal sink current of 3 uA pulls EN pin low and disables the device. 9.4 Device Functional Modes 9.4.1 Shutdown Mode The LM74700-Q1 enters shutdown mode when the EN pin voltage is below the specified input low threshold V(EN_IL). Both the gate driver and the charge pump are disabled in shutdown mode. During shutdown mode the LM74700-Q1 enters low IQ operation with the ANODE pin only sinking 1 µA. When the LM74700-Q1 is in shutdown mode, forward current flow through the external MOSFET is not interrupted but is conducted through the MOSFET's body diode. 9.4.2 Conduction Mode Conduction mode occurs when the gate driver is enabled. There are three regions of operating during conduction mode based on the ANODE to CATHODE voltage of the LM74700-Q1. Each of the three modes is described in the Regulated Condution Mode, Full Conduction Mode and Reverse Current Protection Mode sections. 9.4.2.1 Regulated Conduction Mode For the LM74700-Q1 to operate in regulated conduction mode, the gate driver must be enabled as described in the Gate Driver section and the current from source to drain of the external MOSFET must be within the range to result in an ANODE to CATHODE voltage drop of –11 mV to 50 mV. During forward regulation mode the ANODE to CATHODE voltage is regulated to 20 mV by adjusting the GATE to ANODE voltage. This closed loop regulation scheme enables graceful turn off of the MOSFET at very light loads and ensures zero DC reverse current flow. 9.4.2.2 Full Conduction Mode For the LM74700-Q1 to operate in full conduction mode the gate driver must be enabled as described in the Gate Driver section and the current from source to drain of the external MOSFET must be large enough to result in an ANODE to CATHODE voltage drop of greater than 50-mV typical. If these conditions are achieved the GATE pin is internally connected to the VCAP pin resulting in the GATE to ANODE voltage being approximately the same as the VCAP to ANODE voltage. By connecting VCAP to GATE the external MOSFET's RDS(ON) is minimized reducing the power loss of the external MOSFET when forward currents are large. 9.4.2.3 Reverse Current Protection Mode For the LM74700-Q1 to operate in reverse current protection mode, the gate driver must be enabled as described in the Gate Driver section and the current of the external MOSFET must be flowing from the drain to the source. When the ANODE to CATHODE voltage is typically less than –11 mV, reverse current protection mode is entered and the GATE pin is internally connected to the ANODE pin. The connection of the GATE to ANODE pin disables the external MOSFET. The body diode of the MOSFET blocks any reverse current from flowing from the drain to source. Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 15 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 10 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 10.1 Application Information The LM74700-Q1 is used with N-Channel MOSFET controller in a typical reverse polarity protection application. The schematic for the 12-V battery protection application is shown in Figure 10-1 where the LM74700-Q1 is used in series with a battery to drive the MOSFET Q1. The TVS is not required for the LM74700-Q1 to operate, but they are used to clamp the positive and negative voltage surges. The output capacitor COUT is recommended to protect the immediate output voltage collapse as a result of line disturbance. 10.1.1 Typical Application Q1 Voltage Regulator CIN VBAT EN TVS VCAP ANODE GATE COUT CATHODE LM74700 VCAP GND Figure 10-1. Typical Application Circuit 10.1.1.1 Design Requirements A design example, with system design parameters listed in Table 10-1 is presented. Table 10-1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Input voltage range 12-V Battery, 12-V Nominal with 3.2-V Cold Crank and 35-V Load Dump Output voltage 3.2 V during Cold Crank to 35-V Load Dump Output current range 3-A Nominal, 5-A Maximum Output capacitance 1-µF Minimum, 47-µF Typical Hold Up Capacitance Automotive EMC Compliance ISO 7637-2 and ISO 16750-2 10.1.1.2 Detailed Design Procedure 10.1.1.2.1 Design Considerations • • 16 Input operating voltage range, including cold crank and load dump conditions Nominal load current and maximum load current Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 10.1.1.2.2 MOSFET Selection The important MOSFET electrical parameters are the maximum continuous drain current ID, the maximum drainto-source voltage VDS(MAX), the maximum source current through body diode and the drain-to-source On resistance RDSON. The maximum continuous drain current, ID, rating must exceed the maximum continuous load current. The maximum drain-to-source voltage, VDS(MAX), must be high enough to withstand the highest differential voltage seen in the application. This would include any anticipated fault conditions. It is recommended to use MOSFETs with voltage rating up to 60-V maximum with the LM74700-Q1 because anode-cathode maximum voltage is 65 V. The maximum VGS LM74700-Q1 can drive is 13 V, so a MOSFET with 15-V minimum VGS should be selected. If a MOSFET with < 15-V VGS rating is selected, a zener diode can be used to clamp VGS to safe level. During startup, inrush current flows through the body diode to charge the bulk hold-up capacitors at the output. The maximum source current through the body diode must be higher than the inrush current that can be seen in the application. To reduce the MOSFET conduction losses, lowest possible RDS(ON) is preferred, but selecting a MOSFET based on low RDS(ON) may not be beneficial always. Higher RDS(ON) will provide increased voltage information to LM74700-Q1's reverse comparator at a lower reverse current. Reverse current detection is better with increased RDS(ON). It is recommended to operate the MOSFET in regulated conduction mode during nominal load conditions and select R DS(ON) such that at nominal operating current, forward voltage drop VDS is close to 20-mV regulation point and not more than 50 mV. As a guideline, it is suggested to choose (20 mV / ILoad(Nominal)) ≤ RDS(ON) ≤ ( 50 mV / ILoad(Nominal)). MOSFET manufacturers usually specify RDS(ON) at 4.5-V VGS and 10-V VGS. RDS(ON) increases drastically below 4.5-V VGS and RDS(ON) is highest when VGS is close to MOSFET Vth. For stable regulation at light load conditions, it is recommended to operate the MOSFET close to 4.5-V VGS, that is, much higher than MOSFET gate threshold voltage. It is recommended to choose MOSFET gate threshold voltage Vth of 2-V to 2.5-V maximum. Choosing a lower Vth MOSFET also reduces the turn ON time. Based on the design requirements, preferred MOSFET ratings are: • • • 60-V VDS(MAX) and ±20-V VGS(MAX) RDS(ON) at 3-A nominal current: (20 mV / 3A ) ≤ RDS(ON) ≤ ( 50 mV / 3A ) = 6.67 mΩ ≤ RDS(ON) ≤ 16.67 mΩ MOSFET gate threshold voltage Vth: 2V maximum DMT6007LFG MOSFET from Diodes Inc. is selected to meet this 12-V reverse battery protection design requirements and it is rated at: • • • 60-V VDS(MAX) and ±20-V VGS(MAX) RDS(ON) 6.5-mΩ typical and 8.5-mΩ maximum rated at 4.5-V VGS MOSFET Vth: 2-V maximum Thermal resistance of the MOSFET should be considered against the expected maximum power dissipation in the MOSFET to ensure that the junction temperature (TJ) is well controlled. 10.1.1.2.3 Charge Pump VCAP, input and output capacitance Minimum required capacitance for charge pump VCAP and input/output capacitance are: • • • VCAP: Minimum 0.1 µF is required; recommended value of VCAP (µF) ≥ 10 x CISS(MOSFET)(µF) CIN: minimum 22 nF of input capacitance COUT: minimum 100 nF of output capacitance 10.1.1.3 Selection of TVS Diodes for 12-V Battery Protection Applications TVS diodes are used in automotive systems for protection against transients. In the 12-V battery protection application circuit shown in Figure 10-2, a bi-directional TVS diode is used to protect from positive and negative transient voltages that occur during normal operation of the car and these transient voltage levels and pulses are specified in ISO 7637-2 and ISO 16750-2 standards. Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 17 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 There are two important specifications are breakdown voltage and clamping voltage of the TVS. Breakdown voltage is the voltage at which the TVS diode goes into avalanche similar to a zener diode and is specified at a low current value typical 1 mA and the breakdown voltage should be higher than worst case steady state voltages seen in the system. The breakdown voltage of the TVS+ should be higher than 24-V jump start voltage and 35-V suppressed load dump voltage and less than the maximum ratings of LM74700-Q1 (65 V). The breakdown voltage of TVS- should be beyond than maximum reverse battery voltage –16 V, so that the TVS- is not damaged due to long time exposure to reverse connected battery. Clamping voltage is the voltage the TVS diode clamps in high current pulse situations and this voltage is much higher than the breakdown voltage. TVS diodes are meant to clamp transient pulses and should not interfere with steady state operation. In the case of an ISO 7637-2 pulse 1, the input voltage goes up to –150 V with a generator impedance of 10 Ω. This translates to 15 A flowing through the TVS - and the voltage across the TVS would be close to its clamping voltage. Q1 Voltage Regulator CIN 22 nF VBAT TVS SMBJ33CA EN ANODE VCAP 0.1 µF GATE CATHODE COUT 47 µF LM74700 VCAP GND Figure 10-2. Typical 12-V Battery Protection with Single Bi-Directional TVS The next criterion is that the absolute maximum rating of Anode to Cathode reverse voltage of the LM74700-Q1 (–75 V) and the maximum VDS rating MOSFET are not exceeded. In the design example, 60-V rated MOSFET is chosen and maximum limit on the cathode to anode voltage is 60 V. In case of ISO 7637-2 pulse 1, the anode of LM74700-Q1 is pulled down by the ISO pulse and clamped by TVS-. The MOSFET is turned off quickly to prevent reverse current from discharging the bulk output capacitors. When the MOSFET turns off, the cathode to anode voltage seen is equal to (TVS Clamping voltage + Output capacitor voltage). If the maximum voltage on output capacitor is 16 V (maximum battery voltage), then the clamping voltage of the TVS- should not exceed, (60 V – 16) V = –44 V. The SMBJ33CA TVS diode can be used for 12-V battery protection application. The breakdown voltage of 36.7 V meets the jump start, load dump requirements on the positive side and 16-V reverse battery connection on the negative side. During ISO 7637-2 pulse 1 test, the SMBJ33CA clamps at –44 V with 15 A of peak surge current as shown in Figure 10-5 and it meets the clamping voltage ≤ 44 V. SMBJ series of TVS' are rated up to 600-W peak pulse power levels. This is sufficient for ISO 7637-2 pulses and suppressed load dump (ISO-16750-2 pulse B). 10.1.1.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications Typical 24-V battery protection application circuit shown in Figure 10-3 uses two uni-directional TVS diodes to protect from positive and negative transient voltages. 18 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM74700-Q1 LM74700-Q1 www.ti.com SNOSD17G – OCTOBER 2017 – REVISED DECEMBER 2020 Q1 TVS+ SMBJ58A Voltage Regulato