Datasheet · 2025

TI DRV5056 Unipolar Ratiometric Linear Hall-Effect Sensor — Datasheet (SBAS644C)

Unipolar linear Hall sensor with a 0.6 V offset, running from 3.3 V or 5 V; the sensor chosen for the analogue Hall trigger.

Author: Texas Instruments
Year: 2025
Type: Datasheet
Credit: Texas Instruments (ti.com)

hall sensor
linear
trigger

← Back to the Reference Library

DRV5056 SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 DRV5056 Unipolar Ratiometric Linear Hall-Effect Sensor 1 Features 3 Description • • • The DRV5056 is a linear Hall-effect sensor that responds proportionally to flux density of a magnetic south pole. The device can be used for accurate position sensing in a wide range of applications. • • • • • Unipolar linear hall effect magnetic sensor Operates from 3.3V and 5V power supplies Analog output with 0.6V quiescent offset: – Maximizes voltage swing for high accuracy Magnetic sensitivity options (at VCC = 5V): – A1/Z1: 200mV/mT, 20mT range – A2/Z2: 100mV/mT, 39mT range – A3/Z3: 50mV/mT, 79mT range – A4/Z4: 25mV/mT, 158mT range – A6: 100mV/mT, 39mT range – A8: 66.6mV/mT, 64mT range Fast 20kHz sensing bandwidth Low-noise output with ±1mA drive Compensation for magnet temperature drift for A1/A2/A3/A4/A6/A8 versions and None for the Z1/Z2/Z3/Z4 versions Standard industry packages: – Surface-mount SOT-23 – Through-hole TO-92 2 Applications • • • • • • • • Precise position sensing Industrial automation and robotics Home appliances Gamepads, pedals, keyboards, triggers Height leveling, tilt and weight measurement Fluid flow rate measurement Medical devices Current sensing Featuring a unipolar magnetic response, the analog output drives 0.6V when no magnetic field is present, and increases when a south magnetic pole is applied. This response maximizes the output dynamic range in applications that sense one magnetic pole. Multiple sensitivity options further maximize the output swing based on the required sensing range. The device operates from 3.3V or 5V power supplies. Magnetic flux perpendicular to the top of the package is sensed, and the two package options provide different sensing directions. The device uses a ratiometric architecture that can minimize error from VCC tolerance when the external analog-to-digital converter (ADC) uses the same VCC for the reference. Additionally, the device features magnet temperature compensation to counteract how magnets drift for linear performance across a wide –40°C to +125°C temperature range. Device options for no temperature compensation of magnet drift are also available. Package Information PART NUMBER DRV5056 (1) (2) VCC PACKAGE(1) PACKAGE SIZE(2) DBZ (SOT-23, 3) 2.92mm × 2.37mm LPG (TO-92, 3) 4.00mm × 1.52mm For all available packages, see the package option addendum at the end of the data sheet. The package size (length × width) is a nominal value and includes pins, where applicable. OUT VCC DRV5056 VCC OUT Controller VL (MAX) ADC GND 0.6 V Typical Schematic B south 0 mT Magnetic Response An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Pin Configuration and Functions...................................3 5 Specifications.................................................................. 4 5.1 Absolute Maximum Ratings........................................ 4 5.2 ESD Ratings............................................................... 4 5.3 Recommended Operating Conditions.........................4 5.4 Thermal Information....................................................4 5.5 Electrical Characteristics.............................................5 5.6 Magnetic Characteristics.............................................5 5.7 Typical Characteristics................................................ 6 6 Detailed Description...................................................... 11 6.1 Overview................................................................... 11 6.2 Functional Block Diagram......................................... 11 6.3 Feature Description...................................................11 6.4 Device Functional Modes..........................................15 2 7 Application and Implementation.................................. 16 7.1 Application Information............................................. 16 7.2 Typical Application.................................................... 17 7.3 Best System Practices.............................................. 19 7.4 Power Supply Recommendations.............................21 7.5 Layout....................................................................... 21 8 Device and Documentation Support............................22 8.1 Documentation Support............................................ 22 8.2 Receiving Notification of Documentation Updates....22 8.3 Support Resources................................................... 22 8.4 Trademarks............................................................... 22 8.5 Electrostatic Discharge Caution................................22 8.6 Glossary....................................................................22 9 Revision History............................................................ 22 10 Mechanical, Packaging, and Orderable Information.................................................................... 23 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 4 Pin Configuration and Functions 1 VCC 3 OUT GND 2 Figure 4-1. DBZ Package 3-Pin SOT-23 Top View 1 2 3 VCC GND OUT Figure 4-2. LPG Package 3-Pin TO-92 Top View Table 4-1. Pin Functions PIN TYPE DESCRIPTION NAME SOT-23 TO-92 GND 3 2 Ground Ground reference OUT 2 3 Output Analog output VCC 1 1 Power Power supply. TI recommends connecting this pin to a ceramic capacitor to ground with a value of at least 0.1µF. Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 3 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX Power supply voltage VCC –0.3 7 UNIT V Output voltage OUT –0.3 VCC + 0.3 V Magnetic flux density, BMAX Unlimited Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) T Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. 5.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 5.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX 3 3.6 4.5 5.5 UNIT VCC Power supply voltage(1) IO Output continuous current –1 1 mA TA A1/Z1-A4/Z4, A8 versions operating ambient temperature(2) –40 125 °C TA A6 version operating ambient temperature(2) 0 85 °C (1) (2) V There are two isolated operating VCC ranges. For more information see the Section 6.3.5 section. Power dissipation and thermal limits must be observed. 5.4 Thermal Information DRV5056 THERMAL METRIC(1) SOT-23 (DBZ) TO-92 (LPG) UNIT 3 PINS 3 PINS RθJA Junction-to-ambient thermal resistance 170 121 °C/W RθJC(top) Junction-to-case (top) thermal resistance 66 67 °C/W RθJB Junction-to-board thermal resistance 49 97 °C/W YJT Junction-to-top characterization parameter 1.7 7.6 °C/W YJB Junction-to-board characterization parameter 48 97 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 4 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 5.5 Electrical Characteristics for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted) TEST CONDITIONS(1) PARAMETER ICC Operating supply current tON Power-on time (see Power-On Time) fBW Sensing bandwidth td Propagation delay time BND Input-referred RMS noise density BN Input-referred noise VN (1) (2) Output-referred noise(2) MIN B = 0 mT, no load on OUT TYP MAX UNIT 6 10 mA 150 300 µs 20 kHz From change in B to change in OUT 10 µs VCC = 5 V 130 VCC = 3.3 V 215 BND × 6.6 × √20 kHz BN × S VCC = 5 V 0.12 VCC = 3.3 V 0.2 DRV5056A1/Z1 24 DRV5056A2/Z2, DRV5056A6 12 DRV5056A3/Z3 6 DRV5056A4/Z4 3 DRV5056A8 4 nT/√Hz mTPP mVPP mVPP B is the applied magnetic flux density. VN describes voltage noise on the device output. If the full device bandwidth is not needed, noise can be reduced with an RC filter. 5.6 Magnetic Characteristics for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted) TEST CONDITIONS(1) PARAMETER VQ Quiescent voltage B = 0 mT, TA = 25°C MIN TYP MAX DRV5056A1/Z1 0.535 0.6 0.665 DRV5056A2/Z2, DRV5056A6 0.54 0.6 0.66 DRV5056A3/Z3, DRV5056A4/Z4 0.55 0.6 0.65 DRV5056A8 0.55 0.6 0.65 VQΔT Quiescent voltage temperature drift B = 0 mT, TA = –40°C to 125°C versus 25°C VQΔT Quiescent voltage temperature drift B = 0 mT, TA = –40°C to 125°C versus 25°C VQΔL Quiescent voltage lifetime drift High-temperature operating stress for 1000 hours VCC = 5 V, TA = 25°C S Sensitivity VCC = 3.3 V, TA = 25°C VCC = 5 V 0.08 VCC = 3.3 V 0.04 DRV5056A8 0 UNIT V V V V < 0.5% DRV5056A1/Z1 190 200 210 DRV5056A2/Z2, DRV5056A6 95 100 105 DRV5056A3/Z3 47.5 50 52.5 DRV5056A4/Z4 23.8 25 26.2 DRV5056A8 63.3 66.6 69.9 DRV5056A1/Z1 114 120 126 DRV5056A2/Z2, DRV5056A6 57 60 63 DRV5056A3/Z3 28.5 30 31.5 DRV5056A4/Z4 14.3 15 15.8 DRV5056A8 38.0 40 42 mV/mT Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 5 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted) TEST CONDITIONS(1) PARAMETER VCC = 5 V, TA = 25°C Linear magnetic sensing range(2) BL VCC = 3.3 V, TA = 25°C MIN DRV5056A1/Z1 20 DRV5056A2/Z2, DRV5056A6 39 DRV5056A3/Z3 79 DRV5056A4/Z4 158 DRV5056A8 64 DRV5056A1/Z1 19 DRV5056A2/Z2, DRV5056A6 39 DRV5056A3/Z3 78 DRV5056A4/Z4 155 DRV5056A8 Sensitivity temperature compensation for magnets(4) 0.05 VCC – 0.2 0.12 0.19 V %/°C DRV5056A1, DRV5056A2, DRV5056A3, DRV5056A4, DRV5056A8 0.12 %/°C DRV5056Z1, DRV5056Z2, DRV5056Z3, DRV5056Z4 0 %/°C SLE Sensitivity linearity error(3) VOUT is within VL SRE Sensitivity ratiometry error(5) TA = 25°C, with respect to VCC = 3.3 V or 5 V SΔL Sensitivity lifetime drift High-temperature operating stress for 1000 hours (1) (2) (3) (4) (5) UNIT mT VQ DRV5056A6 STC MAX 65 Linear range of output voltage(3) VL TYP ±1% -2.5% 2.5% < 0.5% B is the applied magnetic flux density. BL describes the minimum linear sensing range at 25°C taking into account the maximum VQ and Sensitivity tolerances. See the Section 6.3.3 section. STC describes the rate the device increases Sensitivity with temperature. For more information, see the Section 6.3.6 section. See the Section 6.3.4 section. 5.7 Typical Characteristics at TA = 25°C (unless otherwise noted) 640 7 638 636 Quiescent Voltage (mV) Supply Current (mA) 6.75 6.5 6.25 6 5.75 5.5 5.25 5 -40 632 630 628 626 624 622 620 VCC = 3.3 V VCC = 5 V 618 616 -20 0 20 40 60 80 100 Temperature (qC) 120 140 160 3 3.25 D001 Figure 5-1. Supply Current vs Temperature 6 634 3.5 3.75 4 4.25 4.5 4.75 Supply Voltage (V) 5 5.25 5.5 D003 Figure 5-2. Quiescent Voltage vs Supply Voltage Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 655 645 640 Sensitivity (mV/mT) Quiescent Voltage (mV) 650 635 630 625 620 VCC = 3.3 V VCC = 5 V 615 610 -40 -20 0 20 40 60 80 100 Temperature (qC) 120 140 160 D002 DRV5056Ax Figure 5-3. Quiescent Voltage vs Temperature 140 130 120 110 100 90 80 70 60 50 40 30 20 10 A1 A2 3 3.1 3.2 A3 A4 3.3 3.4 VCC (V) A8 3.5 3.6 VCC = 3.3V Figure 5-4. Sensitivity vs Supply Voltage 250 A1 A2 A3 A4 150 A8 145 140 Sensitivity (mV/mT) Sensitivity (mV/mT) 200 150 100 50 135 130 125 120 115 110 0 4.5 +3STD AVG -3STD 105 4.6 4.7 4.8 4.9 5 5.1 VCC (V) 5.2 5.3 5.4 5.5 100 -40 -20 0 VCC = 5V . 40 60 80 100 Temperature (qC) 120 140 D008 Figure 5-5. Sensitivity vs Supply Voltage Figure 5-6. Sensitivity vs Temperature 260 80 75 Sensitivity (mV/mT) 220 200 180 160 -40 160 DRV5056A1, VCC = 3.3V 240 Sensitivity (mV/mT) 20 +3STD AVG 3STD -20 0 20 40 60 80 100 Temperature (qC) 120 140 70 65 60 +3STD AVG 3STD 55 160 50 -40 -20 D009 DRV5056A1, VCC = 5.0V 0 20 40 60 80 100 Temperature (qC) 120 140 160 D010 DRV5056A2, VCC = 3.3V Figure 5-7. Sensitivity vs Temperature Figure 5-8. Sensitivity vs Temperature Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 7 DRV5056 www.ti.com 120 39 115 37 110 Sensitivity (mV/mT) Sensitivity (mV/mT) SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 105 100 95 90 +3STD AVG 3STD 85 80 -40 -20 0 20 40 60 80 100 Temperature (qC) 120 140 35 33 31 29 +3STD AVG 3STD 27 25 -40 160 -20 0 20 D011 DRV5056A2, VCC = 5.0V 40 60 80 100 Temperature (qC) 120 140 160 D012 DRV5056A3, VCC = 3.3V Figure 5-9. Sensitivity vs Temperature Figure 5-10. Sensitivity vs Temperature 60 19 Sensitivity (mV/mT) Sensitivity (mV/mT) 18 55 50 45 +3STD AVG 3STD 40 -40 -20 0 20 40 60 80 100 Temperature (qC) 120 140 17 16 15 14 +3STD AVG 3STD 13 12 -40 160 -20 0 20 D013 DRV5056A3, VCC = 5.0V 140 160 D014 Figure 5-11. Sensitivity vs Temperature Figure 5-12. Sensitivity vs Temperature 30 80 75 Sensitivity (mV/mT) Sensitivity (mV/mT) 120 DRV5056A4, VCC = 3.3V 28 26 24 22 20 -40 +3STD AVG 3STD 70 65 60 -3STD AVG +3STD 55 50 -20 0 20 40 60 80 100 Temperature (qC) 120 140 160 0 D015 10 20 30 40 50 Temperature (C) 60 70 80 85 D016 DRV5056A6, VCC = 3.3V DRV5056A4, VCC = 5.0V Figure 5-13. Sensitivity vs Temperature 8 40 60 80 100 Temperature (qC) Submit Document Feedback Sensitivity vs Temperature Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 612 120 611 115 610 Quiescent Voltage (mV) Sensitivity (mV/mT) 110 105 100 95 90 -3STD AVG +3STD 85 10 20 30 40 50 Temperature (C) 60 70 608 607 606 605 604 603 602 VCC = 3.3 V VCC = 5 V 601 80 0 609 600 -40 80 85 -20 0 20 D017 DRV5056A6, VCC = 5.0V 40 60 80 100 Temperature (qC) 120 140 160 DRV5056Z1/Z2/Z3/Z4 Sensitivity vs Temperature Figure 5-14. Quiescent Voltage vs Temperature 140 250 120 Z3 Z4 Sensitivity (mV/mT) Sensitivity (mV/MT) 200 Z1 Z2 100 80 60 40 Z1 Z2 150 Z3 Z4 100 50 20 0 2.97 3.07 3.17 3.27 3.37 Supply Voltage (V) 3.47 0 4.5 3.57 4.6 4.7 4.8 4.9 5 Vcc 5.1 5.2 5.3 5.4 5.5 VCC = 5V VCC = 3.3V Figure 5-15. Sensitivity vs Supply Voltage Figure 5-16. Sensitivity vs Supply Voltage 150 260 145 240 +3STD AVG -3STD 135 130 Sensitivity (mV/mT) Sensitivity (mV/mT) 140 125 120 115 110 +3STD AVG 3STD 220 200 180 105 100 -40 -20 0 20 40 60 80 100 Temperature (qC) 120 140 160 160 -40 -20 DRV5056Z1, VCC = 3.3V 0 20 40 60 80 100 Temperature (qC) 120 140 160 DRV5056Z1, VCC = 5.0V Figure 5-17. Sensitivity vs Temperature Figure 5-18. Sensitivity vs Temperature Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 9 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 120 80 115 +3STD AVG 3STD 70 Sensitivity (mV/mT) Sensitivity (mV/mT) 75 65 60 110 105 100 95 90 55 50 -40 +3STD AVG 3STD 85 -20 0 20 40 60 80 100 Temperature (qC) 120 140 80 -40 160 -20 0 20 D010 40 60 80 100 Temperature (qC) 120 140 160 DRV5056Z2, VCC = 5.0V DRV5056Z2, VCC = 3.3V Figure 5-19. Sensitivity vs Temperature Figure 5-20. Sensitivity vs Temperature 39 60 35 +3STD AVG 3STD 33 Sensitivity (mV/mT) Sensitivity (mV/mT) 37 31 29 55 50 45 +3STD AVG 3STD 27 25 -40 -20 0 20 40 60 80 100 Temperature (qC) 120 140 40 -40 160 -20 0 DRV5056Z3, VCC = 3.3V 20 40 60 80 100 Temperature (qC) 120 140 160 DRV5056Z3, VCC = 5.0V Figure 5-21. Sensitivity vs Temperature Figure 5-22. Sensitivity vs Temperature 19 30 18 Sensitivity (mV/mT) Sensitivity (mV/mT) 28 17 16 15 14 +3STD AVG 3STD 13 12 -40 -20 0 20 40 60 80 100 Temperature (qC) 120 140 160 26 24 22 20 -40 +3STD AVG 3STD -20 DRV5056Z4, VCC = 3.3V 20 40 60 80 100 Temperature (qC) 120 140 160 DRV5056Z4, VCC = 5.0V Figure 5-23. Sensitivity vs Temperature 10 0 Figure 5-24. Sensitivity vs Temperature Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 6 Detailed Description 6.1 Overview The DRV5056 is a 3-pin linear Hall-effect sensor with fully integrated signal conditioning, temperature compensation circuits, mechanical stress cancellation, and amplifiers. The device operates from 3.3V and 5V (±10%) power supplies, measures magnetic flux density, and outputs a proportional analog voltage that is referenced to VCC. 6.2 Functional Block Diagram Element Bias Offset Cancellation Band-Gap Reference VCC Trim Registers GND 0.1 F Temperature Compensation VCC Optional Filter Precision Amplifier Output Driver OUT 6.3 Feature Description 6.3.1 Magnetic Flux Direction As shown in Figure 6-1, the DRV5056 is sensitive to the magnetic field component that is perpendicular to the die inside the package. TO-92 B B SOT-23 PCB Figure 6-1. Direction of Sensitivity Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 11 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 Magnetic flux that travels from the bottom to the top of the package is considered positive. This condition exists when a south magnetic pole is near the top (marked-side) of the package. Magnetic flux that travels from the top to the bottom of the package results in negative millitesla values. N S S PCB N PCB Figure 6-2. The Flux Direction for Positive B 6.3.2 Magnetic Response The DRV5056 outputs an analog voltage according to Equation 1 when in the presence of a magnetic field: where • • • • • • VOUT = VQ + B × Sensitivity 25°C × 1 + STC × TA − 25°C (1) VQ is typically 600mV B is the applied magnetic flux density Sensitivity(25°C) depends on the device option and VCC STC is typically 0.12%/°C for device options DRV5056Ax and is 0%/°C for DRV5056Zx options TA is the ambient temperature VOUT is within the VL range As an example, consider the DRV5056A3 with VCC = 3.3V, a temperature of 50°C, and 67mT applied. Excluding tolerances, VOUT = 600mV + 67 mT × (30mV/mT × [1 + 0.0012/°C × (50°C – 25°C)]) = 2.67V. The DRV5056 only responds to the flux density of a magnetic south pole. 12 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 6.3.3 Sensitivity Linearity The device produces a linear response when the output voltage is within the specified VL range. Outside this range, sensitivity is reduced and nonlinear. Figure 6-3 graphs the magnetic response. OUT VCC VL (MAX) 0.6 V B south 0 mT Figure 6-3. Magnetic Response Equation 2 calculates parameter BL, the minimum linear sensing range at 25°C taking into account the maximum quiescent voltage and sensitivity tolerances. BL(MIN) = VL(MAX) ± VQ(MAX) S(MAX) (2) The parameter S LE defines linearity error as the difference in sensitivity between any two positive B values when the output is within the VL range. 6.3.4 Ratiometric Architecture The DRV5056 has a ratiometric analog architecture that scales the sensitivity linearly with the power-supply voltage. For example, the sensitivity is 5% higher when VCC = 5.25V compared to VCC = 5V. This behavior enables external ADCs to digitize a more consistent value regardless of the power-supply voltage tolerance, when the ADC uses VCC as the reference. Equation 3 calculates sensitivity ratiometry error: SRE = 1 t S(VCC) / S(5V) VCC / 5V for VCC = 4.5 V to 5.5 V, SRE = 1 t S(VCC) / S(3.3V) VCC / 3.3V for VCC = 3 V to 3.6 V (3) where • • • S(VCC) is the sensitivity at the current VCC voltage S(5V) or S(3.3V) is the sensitivity when VCC = 5V or 3.3V VCC is the current VCC voltage Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 13 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 6.3.5 Operating VCC Ranges The DRV5056 has two recommended operating VCC ranges: 3V to 3.6V and 4.5V to 5.5V. When VCC is in the middle region between 3.6V to 4.5V, the device continues to function, but sensitivity is less known because there is a crossover threshold near 4V that adjusts device characteristics. 6.3.6 Sensitivity Temperature Compensation For Magnets Magnets generally produce weaker fields as temperature increases. The DRV5056 can either compensate by increasing sensitivity with temperature or keep the sensitivity constant, as defined by the parameters STC and STCz respectively. For DRV5056Ax device options, the sensitivity at TA = 125°C is typically 12% higher than at TA = 25°C. For DRV5056Zx device options, the sensitivity at TA = 125°C is typically same as the value at TA = 25°C. 6.3.7 Power-On Time After the VCC voltage is applied, the DRV5056 requires a short initialization time before the output is set. The parameter tON describes the time from when VCC crosses 3V until OUT is within 5% of VQ, with 0mT applied and no load attached to OUT. Figure 6-4 shows this timing diagram. VCC 3V tON time Output 95% × V Q Invalid time Figure 6-4. tON Definition 14 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 6.3.8 Hall Element Location Figure 6-5 shows the location of the sensing element inside each package option. SOT-23 Top View SOT-23 Side View centered 650 µm ±50 µm ±80 µm TO-92 Top View 2 mm 2 mm TO-92 Side View 1.54 mm 1.61 mm ±50 µm 1030 µm ±115 µm Figure 6-5. Hall Element Location 6.4 Device Functional Modes The DRV5056 has one mode of operation that applies when the Recommended Operating Conditions are met. Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 15 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 7 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 7.1 Application Information 7.1.1 Selecting the Sensitivity Option Select the highest DRV5056 sensitivity option that can measure the required range of magnetic flux density, so that the output voltage swing is maximized. Larger magnets and greater sensing distances can generally enable better positional accuracy than very small magnets at close distances, because magnetic flux density increases exponentially with the proximity to a magnet. 7.1.2 Temperature Compensation for Magnets The DRV5056 temperature compensation is designed to directly compensate the average drift of neodymium (NdFeB) magnets and partially compensate ferrite magnets. The residual flux density (Br) of a magnet typically reduces by 0.12%/°C for NdFeB, and 0.20%/°C for ferrite. When the operating temperature range of a system is reduced, temperature drift errors are also reduced. 7.1.3 Adding a Low-Pass Filter As illustrated in the Functional Block Diagram, an RC low-pass filter can be added to the device output for the purpose of minimizing voltage noise when the full 20kHz bandwidth is not needed. This filter can improve the signal-to-noise ratio (SNR) and overall accuracy. Do not connect a capacitor directly to the device output without a resistor in between because doing so can make the output unstable. 7.1.4 Designing for Wire Break Detection Some systems must detect if interconnect wires become open or shorted. The DRV5056 can support this function. First, select a sensitivity option that causes the output voltage to stay within the VL range during normal operation. Second, add a pullup resistor between OUT and VCC. TI recommends a value between 20kΩ to 100 kΩ, and the current through OUT must not exceed the IO specification, including current going into an external ADC. Then, if the output voltage is ever measured to be within 150mV of VCC or GND, a fault condition exists. Figure 7-1 shows the circuit, and Table 7-1 describes fault scenarios. PCB DRV5056 VCC OUT VCC Cable VOUT GND Figure 7-1. Wire Fault Detection Circuit 16 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 Table 7-1. Fault Scenarios and the Resulting VOUT FAULT SCENARIO VOUT VCC disconnects Close to GND GND disconnects Close to VCC VCC shorts to OUT Close to VCC GND shorts to OUT Close to GND 7.2 Typical Application Mechanical Component N S PCB Figure 7-2. Unipolar Sensing Application 7.2.1 Design Requirements Use the parameters listed in Table 7-2 for this design example. Table 7-2. Design Parameters DESIGN PARAMETER EXAMPLE VALUE VCC 3.3V Magnet 10mm diameter × 6mm long cylinder, ferrite Distance from magnet to sensor From 20mm to 3mm Maximum B at the sensor at 25°C 72mT at 3mm Device option DRV5056A3 7.2.2 Detailed Design Procedure This design example consists of a mechanical component that moves back and forth, an embedded magnet with the south pole facing the printed-circuit board, and a DRV5056 . The DRV5056 outputs an analog voltage that describes the precise position of the component. The component must not contain ferromagnetic materials such as iron, nickel, and cobalt because these materials change the magnetic flux density at the sensor. Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 17 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 When designing a linear magnetic sensing system, always consider these three variables: the magnet, sensing distance, and range of the sensor. Select the DRV5056 with the highest sensitivity that has a BL (linear magnetic sensing range) that is larger than the maximum magnetic flux density in the application. Magnets are made from various ferromagnetic materials that have tradeoffs in cost, drift with temperature, absolute maximum temperature ratings, remanence or residual induction (Br), and coercivity (Hc). The Br and the dimensions of a magnet determine the magnetic flux density (B) produced in 3-dimensional space. For simple magnet shapes, such as rectangular blocks and cylinders, there are simple equations that solve B at a given distance centered with the magnet. Figure 7-3 shows diagrams for Equation 4 and Equation 5. Thickness Thickness Width Distance Length S S Distance N B N B Diameter Figure 7-3. Rectangular Block and Cylinder Magnets Use Equation 4 for the rectangular block shown in Figure 7-3: B= Br Œ ( ( WL arctan 2 2 2D 4D + W + L 2 ) ± arctan ( WL 2(D + T) 4(D + T)2 + W2 + L2 )) (4) Use Equation 5 for the cylinder shown in Figure 7-3: B= Br 2 ( D+T 2 (0.5C) + (D + T) 2 ± D (0.5C)2 + D2 ) (5) where • • • • • 18 W is width L is length T is thickness (the direction of magnetization) D is distance C is diameter Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 7.2.3 Application Curve Figure 7-4 shows the magnetic flux density versus distance for a 10mm × 6mm cylinder ferrite magnet. 80 Magnetic Flux Density (mT) 70 60 50 40 30 20 10 0 3 6 9 12 15 Distance (mm) 18 21 D001 Figure 7-4. Magnetic Profile of a 10mm × 6mm Cylindrical Ferrite Magnet 7.3 Best System Practices Because the Hall element is sensitive to magnetic fields that are perpendicular to the top of the package, a correct magnet approach must be used for the sensor to detect the field. Figure 7-5 illustrates correct and incorrect approaches. Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 19 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 CORRECT N S S N N S INCORRECT N S Figure 7-5. Correct and Incorrect Magnet Approaches 20 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 7.4 Power Supply Recommendations A decoupling capacitor close to the device must be used to provide local energy with minimal inductance. TI recommends using a ceramic capacitor with a value of at least 0.01µF. 7.5 Layout 7.5.1 Layout Guidelines Magnetic fields pass through most nonferromagnetic materials with no significant disturbance. Embedding Halleffect sensors within plastic or aluminum enclosures and sensing magnets on the outside is common practice. Magnetic fields also easily pass through most printed-circuit boards, which makes placing the magnet on the opposite side possible. 7.5.2 Layout Examples VCC GND VCC GND OUT OUT Figure 7-6. Layout Examples Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 21 DRV5056 www.ti.com SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 8 Device and Documentation Support 8.1 Documentation Support 8.1.1 Related Documentation For related documentation see the following: • Texas Instruments, Incremental rotary encoder design considerations application note • Texas Instruments, Using linear hall effect sensors to measure angle application note • Texas Instruments, Angle measurements with linear hall effect sensors 8.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 8.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 8.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 8.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 8.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 9 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (March 2020) to Revision C (December 2025) Page • Updated the numbering format for tables, figures, and cross-references throughout the document................. 1 • Updated Features list with A8 variant information.............................................................................................. 1 • Changed Device Information table to Package Information .............................................................................. 1 • Added DRV5056A8 Output-refferred noise to Electrical Characteristics ...........................................................5 • Added DRV5056A8 Quiescent voltage to Magnetic Characteristics ................................................................. 5 • Added DRV5056A8 Sensitivity to Magnetic Characteristics ..............................................................................5 • Added DRV5056A8 Linear magnetic sensing range to Magnetic Characteristics .............................................5 • Updated the device naming in Magnetic Response ........................................................................................ 12 • Updated the device naming in Sensitivity Temperature Compensation For Magnets ..................................... 14 • Changed What to Do and What Not to Do section to Best System Practices .................................................19 Changes from Revision * (February 2019) to Revision B (March 2020) Page • Added Zero TC sensitivity options .....................................................................................................................1 22 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 DRV5056 www.ti.com • • • • • • SBAS644C – APRIL 2018 – REVISED DECEMBER 2025 Added Zero TC information to Recommended Operating Conditions section....................................................4 Added Zero TC information to Electrical Characterstics ....................................................................................5 Added Zero TC information to Magnetic Characterstics.....................................................................................5 Added graphs for DRV5056Z1/Z2/Z3/Z4 options in the Typical Characteristics section.................................... 6 Updated STC definition in Equation 1 ...............................................................................................................12 Updated the Sensitivity Temperature Compensation For Magnets section for Zero TC options......................14 Changes from Revision * (April 2018) to Revision A (February 2019) Page • Added new A6 magnetic sensitivity option to the data sheet............................................................................. 1 10 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DRV5056 23 PACKAGE OPTION ADDENDUM www.ti.com 5-Mar-2026 PACKAGING INFORMATION Orderable part number Status Material type (1) (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material MSL rating/ Peak reflow (4) (5) Op temp (°C) Part marking (6) DRV5056A1QDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A1 DRV5056A1QDBZR.A Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A1 DRV5056A1QDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A1 DRV5056A1QDBZT Obsolete Production SOT-23 (DBZ) | 3 - - Call TI Call TI -40 to 125 56A1 DRV5056A1QLPG Active Production TO-92 (LPG) | 3 1000 | BULK Yes SN N/A for Pkg Type -40 to 125 56A1 DRV5056A1QLPG.B Active Production TO-92 (LPG) | 3 1000 | BULK Yes SN N/A for Pkg Type -40 to 125 56A1 DRV5056A1QLPGM Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A1 DRV5056A1QLPGM.A Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A1 DRV5056A1QLPGM.B Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A1 DRV5056A2QDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A2 DRV5056A2QDBZR.A Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A2 DRV5056A2QDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A2 DRV5056A2QDBZT Obsolete Production SOT-23 (DBZ) | 3 - - Call TI Call TI -40 to 125 56A2 DRV5056A2QLPG Active Production TO-92 (LPG) | 3 1000 | BULK Yes SN N/A for Pkg Type -40 to 125 56A2 DRV5056A2QLPG.B Active Production TO-92 (LPG) | 3 1000 | BULK Yes SN N/A for Pkg Type -40 to 125 56A2 DRV5056A2QLPGM Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A2 DRV5056A2QLPGM.A Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A2 DRV5056A2QLPGM.B Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A2 DRV5056A3QDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A3 DRV5056A3QDBZR.A Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A3 DRV5056A3QDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes SN Level-2-260C-1 YEAR -40 to 125 56A3 DRV5056A3QDBZT Obsolete Production SOT-23 (DBZ) | 3 - - Call TI Call TI -40 to 125 56A3 DRV5056A3QLPG Active Production TO-92 (LPG) | 3 1000 | BULK Yes SN N/A for Pkg Type -40 to 125 56A3 DRV5056A3QLPG.B Active Production TO-92 (LPG) | 3 1000 | BULK Yes SN N/A for Pkg Type -40 to 125 56A3 DRV5056A3QLPGM Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A3 DRV5056A3QLPGM.A Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A3 DRV5056A3QLPGM.B Active Production TO-92 (LPG) | 3 3000 | AMMO Yes SN N/A for Pkg Type -40 to 125 56A3 DRV5056A4QDBZR Active P