Datasheet · 2020

TI BQ77904/BQ77905 3S–20S Ultra Low-Power Stackable Li-Ion Battery Protector — Datasheet (SLUSCM3K)

The picked pack protector.

Author: Texas Instruments
Year: 2020
Type: Datasheet
Credit: Texas Instruments (ti.com)

battery protector
bms
li-ion

BQ77904, BQ77905 SLUSCM3K – JUNE 2016 – REVISED JULY 2020 BQ77904, BQ77905 3-Series to 20-Series Ultra Low-Power Voltage, Current, Temperature, and Open-Wire Stackable Lithium-Ion Battery Protector 1 Features • • • • • • • • • • NORMAL mode: 6 µA (BQ77904 and BQ77905) Full suite of voltage, current, and temperature protections Scalable cell count from 3 series to 20 series or more Voltage protection (accuracy ±10 mV) – Overvoltage: 3 V to 4.575 V – Undervoltage: 1.2 V to 3 V Open cell and open-wire detection (OW) Current Protection – Overcurrent discharge 1: –10 mV to –85 mV – Overcurrent discharge 2: –20 mV to +170 mV – Short circuit discharge: –40 mV to +340 mV – Accuracy ±20% for ≤ 20 mV, ±30% for > 20 mV across full temperature Temperature protection – Overtemperature charge: 45°C or 50°C – Overtemperature discharge: 65°C or 70°C – Undertemperature charge: –5°C or 0°C – Undertemperature discharge: –20°C or –10°C Additional Features – Independent charge (CHG) and discharge (DSG) FET drivers – 36-V absolute maximum rating per cell input – Built-in-self-test functions for high reliability SHUTDOWN mode: 0.5-µA maximum Functional Safety-Capable – Documentation available to aid functional safety system design of configurations. Separate overtemperature and undertemperature thresholds for discharge (OTD and UTD) and charge (OTC and UTC) are provided for added flexibility. The device achieves pack protection through the integrated independent CHG and DSG low-side NMOS FET drivers, which may be disabled through two control pins. These control pins may also be used to achieve cell protection solutions for higher series (6 series and beyond) in a simple and economical manner. To do this, simply cascade a higher device CHG and DSG outputs to the immediate lower device control pins. For a reduced component count, all protection faults use internal delay timers. Device Information PART NUMBER(1) PACKAGE BQ77904 TSSOP (20) BQ77905 (1) 6.50 mm × 4.40 mm For all available packages, see the orderable addendum at the end of the data sheet. PACK+ VDD VTB VC5 TS bq77094/5 LD Vss SRP SRN DSG CHGU CTRD CTRC VDD 2 Applications • • • • • • Power tools, garden tools Start-stop battery packs Lead-acid (PbA) replacement batteries Light electric vehicles Energy storage systems, uninterruptible power supplies (UPS) 10.8-V to 72-V packs BODY SIZE (NOM) VTB VC5 TS bq77094/5 LD Vss SRP SRN DSG CHG PACK- Copyright Copyright© ©2017, 2017,Texas TexasInstruments InstrumentsIncorporated Incorporated Simplified Schematic 3 Description The BQ77904 and BQ77905 devices are low-power battery pack protectors that implement a suite of voltage, current, and temperature protections without microcontroller (MCU) control. The device's stackable interface provides simple scaling to support battery cell applications from 3 series to 20 series or more. Protection thresholds and delays are factory-programmed and available in a variety An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Device Comparison......................................................... 4 6 Pin Configuration and Functions...................................5 Pin Functions.................................................................... 5 7 Specifications.................................................................. 6 7.1 Absolute Maximum Ratings........................................ 6 7.2 ESD Ratings............................................................... 6 7.3 Recommended Operating Conditions.........................6 7.4 Thermal Information....................................................7 7.5 Electrical Characteristics.............................................7 7.6 Timing Requirements................................................ 10 7.7 Typical Characteristics.............................................. 11 8 Detailed Description......................................................13 8.1 Overview................................................................... 13 8.2 Functional Block Diagram......................................... 14 8.3 Feature Description...................................................14 8.4 Device Functional Modes..........................................26 9 Application and Implementation.................................. 27 9.1 Application Information............................................. 27 9.2 Typical Application.................................................... 32 9.3 System Examples..................................................... 36 10 Power Supply Recommendations..............................36 11 Layout........................................................................... 37 11.1 Layout Guidelines................................................... 37 11.2 Layout Example...................................................... 37 12 Device and Documentation Support..........................38 12.1 Documentation Support.......................................... 38 12.2 Receiving Notification of Documentation Updates..38 12.3 Support Resources................................................. 38 12.4 Trademarks............................................................. 38 12.5 Electrostatic Discharge Caution..............................38 12.6 Glossary..................................................................38 13 Mechanical, Packaging, and Orderable Information.................................................................... 38 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision J (April 2020) to Revision K (July 2020) Page • Added the BQ7790521 evice in the Device Comparison table...........................................................................4 Changes from Revision I (December 2019) to Revision J (February 2020) Page • Changed the BQ7790518 device to a catalog device in the Device Comparison table......................................4 Changes from Revision H (September 2018) to Revision I (December 2019) Page • Added the BQ7790522 device to the Device Comparison table.........................................................................4 Changes from Revision G (September 2017) to Revision H (September 2018) Page • Changed some wording throughout the data sheet for clarity and conciseness ............................................... 1 • Added the BQ7790518 device to the BQ77905 Device Comparison table........................................................ 4 Changes from Revision F (May 2017) to Revision G (September 2017) Page • Added BQ7790511 and BQ7790512 to the Device Comparison table............................................................... 4 Changes from Revision E (March 2017) to Revision F (May 2017) Page • Changed the BQ7790400 setting: OV delay from 1 s to 2 s. UV from 2800 mV to 2200 mV, UV delay from 1 s to 2 s, UV Hyst from 200 to 400 mV, UV load recovery from N to Y. OCD2 from 80 mV to 60 mV, OCD2 delay from 700 to 350 ms. SCD from 160 mV to 100 mV.............................................................................................4 • Added BQ7790508 and BQ7790509 to the Device Comparison table...............................................................4 Changes from Revision D (March 2017) to Revision E (March 2017) Page • Added BQ7790505 to the Device Comparison table.......................................................................................... 4 • Changed UTC(REC) at 5°C typ from 68.8 to 69.73 %VTB. Changed UTC(REC) at 10°C typ from 64.23 to 65.52 %VTB........................................................................................................................................................7 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 Changes from Revision C (February 2017) to Revision D (March 2017) Page • Changed VOTD, VOTD(REC), VOTC, VOTC(REC), VUTD, VUTD(REC), VUTC, VUTC(REC) MIN and MAX specification values.............................................................................................................................................7 Changes from Revision B (November 2016) to Revision C (February 2017) Page • Added values in the Thermal Information table to align with JEDEC standards.................................................7 Changes from Revision A (June 2016) to Revision B (November 2016) Page • Changed order of listed items in Features .........................................................................................................1 • Table 5-1 and Table 5-2, Changed OTC To: UTC in last column under Temperature. Changed BQ7790400 and BQ7790503 to Production Data. Updated the BQ7790503 configuration .................................................. 4 • Changed pin number from 16-pin to 20-pin ....................................................................................................... 5 • Corrected max value on the UTD at –20°C spec................................................................................................7 • Changed comparator flowcharts with new flowcharts.......................................................................................14 • Corrected CTRC and CTRD delay time entries................................................................................................18 Changes from Revision * (June 2016) to Revision A (June 2016) Page • Changed the device From: Product Preview To: Production.............................................................................. 1 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 3 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 5 Device Comparison NUMBER OF CELLS DEVICE BQ77904 3, 4 BQ77905 3, 4, 5 PROTECTIONS TYPICAL NORMAL MODE CURRENT (µA) PACKAGE 6 20-TSSOP OV, UV, OW, OTD, OTC, UTD, UTC, OCD1, OCD2, SCD, CTRC, CTRD Unless otherwise specified, the devices in Table 5-1 and Table 5-2 come, by default, with the state comparator enabled with a 2-mV threshold. Filtered fault detection is used by default. Contact Texas Instruments for new configuration options or devices in preview. Table 5-1. BQ77904 Device Comparison OV Part Number Threshold (mV) Delay(s) Hyst (mV) 4225 2 100 2200 BQ7790400 Part Number (Cont.) BQ7790400 (1) UV Thresh (mV) Delay(s) 2 OW Hyst (mV) Load Removal Recovery (Y/N) 400 Y OCD1 Current (nA) Threshold (mV) Delay (ms) 0 (disable) 40 1420 Temperature (°C)(1) OCD2 SCD Current Fault Recovery Delay (ms) Threshold (mV) Delay (s) Method OTD OTC UTD UTC 350 100 0 Load Removal 70 50 –20 –5 These thresholds are target based on temperature, but they are dependent on external components that could vary based on customer selection. The circuit is based on the 103AT NTC thermistor connected to TS and VSS, and a 10-kΩ resistor connected to VTB and TS. Actual thresholds must be determined in mV. Refers to the overtemperature and undertemperature mV threshold in the Electrical Characteristics table. Table 5-2. BQ77905 Device Comparison OV UV OW OCD1 Threshold (mV) Delay(s) Hyst (mV) Thresh (mV) Delay(s) Hyst (mV) Load Removal Recovery (Y/N) BQ7790500 4200 0.5 100 2600 1 400 Y 100 30 BQ7790502 4250 1 200 2700 1 200 Y 100 85 700 BQ7790503 4200 1 100 2700 2 400 Y 100 80 1420 BQ7790505 4250 1 200 2700 1 200 N 0 60 10 BQ7790508 3900 1 200 2000 1 400 Y 100 50 700 BQ7790509 4250 1 100 2500 1 400 Y 100 50 700 BQ7790511 4250 1 200 2700 1 200 Y 100 50 350 BQ7790512 4175 1 100 2800 1 400 Y 100 75 1420 BQ7790518 4250 1 100 2750 1 200 Y 100 70 180 BQ7790521 3700 1 200 2500 1 200 Y 100 70 180 BQ7790522 4250 1 100 2800 1 200 Y 100 80 700 Part Number OCD2 Part Number (Cont.) SCD Threshold (mV) Delay (ms) Threshold (mV) BQ7790500 50 700 BQ7790502 120 350 BQ7790503 160 BQ7790505 80 BQ7790508 Current (nA) Threshold (mV) Delay (ms) 1420 Temperature (°C)(1) Current Fault Recovery Delay (s) Method OTD OTC UTD UTC 120 1 Load Removal + Delay 70 50 –20 0 240 — Load Removal 70 50 –20 –5 350 320 — Load Removal 70 50 –20 –5 5 100 9 Load Removal + Delay 65 45 –20 0 100 90 200 1 Load Removal + Delay 70 50 –20 –5 BQ7790509 100 90 200 1 Load Removal + Delay 70 50 –20 –5 BQ7790511 120 90 280 — Load Removal 65 45 –20 0 BQ7790512 150 350 300 1 Load Removal + Delay 65 45 –20 0 BQ7790518 140 20 300 1 Load Removal 70 50 –20 0 BQ7790521 140 20 320 1 Load Removal 70 50 –20 0 BQ7790522 100 350 300 1 Load Removal 70 50 –20 –5 (1) These thresholds are target based on temperature, but they are dependent on external components that could vary based on customer selection. Circuit is based on 103AT NTC thermistor connected to TS and VSS, and a 10-kΩ resistor connected to VTB and TS. 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 Actual thresholds must be determined in mV. Refers to the overtemperature and undertemperature mV threshold in the Electrical Characteristics table. 6 Pin Configuration and Functions VDD 1 20 DVSS AVDD 2 19 CTRD VC5 3 18 CTRC VC4 4 17 CCFG VC3 5 16 VTB VC2 6 15 TS VC1 7 14 LD AVSS 8 13 CHG SRP 9 12 CHGU SRN 10 11 DSG Not to scale Figure 6-1. PW Package 20-Pin TSSOP Top View Pin Functions PIN (1) NAME NO. I/O DESCRIPTION AVDD 2 O Analog supply (only connect to a capacitor) AVSS 8 P Analog ground CCFG 17 I Cell in series-configuration input CHG 13 O CHG FET driver. Use on a single device or on the bottom device of a stack configuration. CHGU 12 O CHG FET signal. Use for the upper device of a stack configuration to feed the CHG signal to the CTRC pin of the lower device. CTRC 18 I CTRD 19 I DSG 11 O DSG FET driver DVSS 20 P Digital ground LD 14 I PACK– load removal detection SRN 10 I Current sense input connecting to the PACK– side of sense resistor SRP 9 I Current sense input connecting to the battery side of sense resistor TS 15 I Thermistor measurement input. Connect a 10-kΩ resistor to AVSS pin if the function is not used. VC1 7 I VC2 6 I VC3 5 I VC4 4 I VC5 3 I Cell voltage sense inputs (Pin 3 must be connected to Pin 4 on the BQ77904 device.) VDD 1 P Supply voltage VTB 16 O Thermistor bias output (1) CHG and DSG override inputs Cell voltage sense inputs I = Input, O = Output, P = Power Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 5 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 7 Specifications 7.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted). All values are referenced to VSS unless otherwise noted.(1) VI Input voltage VO Output voltage range MIN MAX UNIT VDD, VC5, VC4, VC3, VC2, VC1, CCFG, CTRD, CTRC –0.3 36 V LD –30 20 V SRN, SRP, TS, AVDD, CCFG –0.3 3.6 V DSG, CHGU –0.3 20 V CHG –30 20 V VTB –0.3 3.6 V II Input current LD, CHG 500 µA II Input current CHGU, DSG 1 mA IO Output current CHG 1 mA IO Output current CHGU, DSG 1 mA 150 °C Storage temperature, Tstg (1) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±250 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions Over operating free-air temperature range (unless otherwise noted) VBAT VI 6 Supply voltage Input voltage VO Output voltage TA Operating free-range temperature MIN MAX UNIT VDD 3 25 V VC5-VC4, VC4-VC3, VC3-VC2, VC2-VC1, VC1-VSS 0 5 CTRD, CTRC 0 (VDD + 5) CCFG 0 AVDD SRN, SRP –0.2 0.8 LD 0 16 TS 0 VTB CHG, CHGU, DSG 0 16 VTB, AVDD 0 3 –40 85 Submit Document Feedback V V °C Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 7.4 Thermal Information bq77904 bq77905 THERMAL METRIC(1) UNITS PW (TSSOP) 20 PINS RθJA Junction-to-ambient thermal resistance RθJC(top) RθJB ψJT ψJB (1) 98.4 °C/W Junction-to-case (top) thermal resistance 37 °C/W Junction-to-board thermal resistance 49.3 °C/W Junction-to-top characterization parameter 2.9 °C/W Junction-to-board characterization parameter 48.7 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.5 Electrical Characteristics Typical values stated at TA = 25°C and VDD = 16 V (bq77904) or 20 V (bq77905). MIN and MAX values stated with TA = –40°C to +85°C and VDD = 3 to 20 V (bq77904) or VDD = 3 to 25 V (bq77905) unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VOLTAGE V(POR) POR threshold VDD rising, 0 to 6 V V(SHUT) Shutdown threshold VDD falling, 6 to 0 V V(AVDD) AVDD voltage C(VDD) = 1 µF 2 2.1 4 V 3.25 V 2.5 3.25 V SUPPLY AND LEAKAGE CURRENT ICC NORMAL mode current (bq77904/bq77905) Cell1 through Cell5 = 4 V, VDD = 20 V (bq77905) 6 9 µA I(CFAULT) Fault condition current State comparator on 8 12 µA IOFF SHUTDOWN mode current VDD < VSHUT 0.5 µA ILKG(OW_DIS) Input leakage current at VCx All cell voltages = 4 V, pins Open-wire disable configuration ILKG(100nA) Open-wire sink current at VCx pins ILKG(200nA) ILKG(400nA) –100 0 100 nA All cell voltages = 4 V, 100-nA configuration 30 110 175 nA Open-wire sink current at VCx pins All cell voltages = 4 V, 200-nA configuration 95 210 315 nA Open-wire sink current at VCx pins All cell voltages = 4 V, 400-nA configuration 220 425 640 nA PROTECTION ACCURACIES VOV Overvoltage programmable threshold range 3000 4575 mV VUV Undervoltage programmable threshold range 1200 3000 mV TA = 25°C, OV detection accuracy –10 10 mV TA = 25°C, UV detection accuracy –18 18 mV TA = 0 to 60°C –28 26 mV TA = –40 to 85°C –40 40 mV 0 400 mV 200 800 mV V(VA) OV, UV, detection accuracy VHYS(OV) OV hysteresis programmable threshold range VHYS(UV) UV hysteresis programmable threshold range VOTD Overtemperature in discharge programmable threshold (ratio of VTB) Threshold for 65°C(1) 19.71% 20.56% 21.86% V Threshold for 70°C (1) 17.36% 18.22% 19.51% VTB Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 7 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 Typical values stated at TA = 25°C and VDD = 16 V (bq77904) or 20 V (bq77905). MIN and MAX values stated with TA = –40°C to +85°C and VDD = 3 to 20 V (bq77904) or VDD = 3 to 25 V (bq77905) unless otherwise noted. PARAMETER VOTD(REC) TEST CONDITIONS Overtemperature in discharge recovery (ratio of VTB) VOTC Overtemperature in charge programmable threshold (ratio of VTB) VOTC(REC) Overtemperature in charge recovery (ratio of VTB) VUTD Undertemperature in discharge programmable threshold (ratio of VTB) VUTD(REC) Undertemperature in discharge recovery (ratio of VTB) MIN TYP MAX UNIT Recovery threshold at 55°C for when VOTD is at 65°C(1) 25.24% 26.12% 27.44% VTB Recovery threshold at 60°C for when VOTD is at 70°C(1) 22.12% 23.2% 24.24% VTB Threshold for 45°C(1) 32.14% 32.94% 34.54% VTB Threshold for 50°C(1) 29.15% 29.38% 31.45% VTB Recovery threshold at 35°C when VOTD is at 45°C(1) 38.63% 40.97% 40.99% VTB Recovery threshold at 40°C when VOTD is at 50°C(1) 36.18% 36.82% 38.47% VTB Threshold for –20°C(1) 86.41% 87.14% 89.72% VTB Threshold for –10°C(1) 80.04% 80.94% 83.10% VTB Recovery threshold at –10°C when VUTD is at –20°C(1) 80.04% 80.94% 83.10% VTB Recovery threshold at 0°C when VUTD is at –10°C(1) 71.70% 73.18% 74.86% VTB 75.06% 77.22% 78.32% VTB 71.70% 73.18% 74.86% VTB 68.80% 69.73% 71.71% VTB 64.67% 65.52% 67.46% VTB VUTC Undertemperature in charge Threshold for –5°C(1) programmable threshold Threshold for 0°C(1) (ratio of VTB) VUTC(REC) Recovery threshold at 5°C when (1) Undertemperature in Charge VUTC is at –5°C Recovery (ratio of VTB) Recovery threshold at 10°C when VUTC is at 0°C(1) VOCD1 Overcurrent discharge 1 programmable threshold range, (VSRP – VSRN) –85 –10 mV VOCD2 Overcurrent discharge 2 programmable threshold range, (VSRP – VSRN) –20 –170 mV VSCD Short circuit discharge programmable threshold range, (VSRP – VSRN) –40 –340 mV VCCAL OCD1 detection accuracy at VOCD1 > –20 mV lower thresholds –30% 30% VCCAH OCD1, OCD2, SCD detection accuracy VOCD1 ≤ –20 mV; all OCD2 and SCD threshold ranges –20% 20% VOW Open-wire fault voltage threshold at VCx per cell with respect to VCx-1 Voltage falling on VCx, 3.6 V to 0V 450 VOW(HYS) Hysteresis for open wire fault Voltage rising on VCx, 0 V to 3.6 V 500 550 100 mV mV CHARGE AND DISCHARGE FET DRIVERS 8 VDD ≥ 12 V, CL = 10 nF 11 VDD < 12 V, CL = 10 nF VDD – 1 12 V(FETON) CHG/CHGU/DSG on V(FETOFF) CHG/CHGU/DSG off R(CHGOFF) CHG off resistance CHG off for > tCHGPDN and pin held at 2 V 0.5 R(DSGOFF) CHGU/DSG off resistance CHGU/DSG off and pin held at 2 V 10 ICHG(CLAMP) CHG clamp current CHG off and pin held at 18 V No load when CHG/CHGU/DSG is off. Submit Document Feedback 14 V VDD V 0.5 V kΩ 16 Ω 450 µA Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 Typical values stated at TA = 25°C and VDD = 16 V (bq77904) or 20 V (bq77905). MIN and MAX values stated with TA = –40°C to +85°C and VDD = 3 to 20 V (bq77904) or VDD = 3 to 25 V (bq77905) unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 16 18 20.5 V 50 150 µs VCHG(CLAMP) CHG clamp voltage ICHG(CLAMP) = 300 µA tCHGON CHG on rise time CL = 10 nF, 10% to 90% tDSGON CHGU/DSG on rise time CL = 10 nF, 10% to 90% 2 75 µs tCHGOFF CHG off fall time CL = 10 nF, 90% to 10% 15 30 µs tDSGOFF CHGU/DSG off fall time CL = 10 nF, 90% to 10% 5 15 µs 0.6 V CTRC AND CTRD CONTROL With respect to VSS. Enabled < MAX VCTR1 Enable FET driver (VSS) VCTR2 Enable FET driver (Stacked) Enabled > MIN VCTR(DIS) Disable FET driver Disabled between MIN and MAX VCTR(MAXV) CTRC and CTRD clamp voltage ICTR = 600 nA tCTRDEG_ON) (2) CTRC and CTRD deglitch for ON signal 7 ms tCTRDEG_OFF (2) CTRC and CTRD deglitch for OFF signal 7 ms VDD + 2.2 V 2.04 VDD + 2.8 VDD + 4 VDD + 0.7 V VDD + 5 V CURRENT STATE COMPARATOR V(STATE_D1) Discharge qualification threshold1 Measured at SRP-SRN –3 –2 –1 mV V(STATE_C1) Charge qualification threshold1 Measured at SRP-SRN 1 2 3 mV tSTATE (2) State detection qualification time 1.2 ms LOAD REMOVAL DETECTION VLD(CLAMP) LD clamp voltage I(LDCLAMP) = 300 µA ILD(CLAMP) LD clamp current V(LDCLAMP) = 18 V 16 VLDT LD threshold Load removed < when VLDT 1.25 RLD(INT) LD input resistance when enabled Measured to VSS tLD_DEG LD detection deglitch 18 20.5 V 450 µA 1.3 1.35 V 160 250 375 kΩ 1 1.5 2.3 ms 10% V 100% V 45% V CCFG PIN V(CCFGL) CCFG threshold low (ratio of 3-cell configuration VAVDD) V(CCFGH) CCFG threshold high (ratio of VAVDD) 4-cell configuration 65% V(CCFGHZ) CFG threshold high-Z (ratio of VAVDD) 5-cell configuration, CCFG floating, internally biased 25% tCCFG_DEG (2) CCFG deglitch 33% 6 ms CUSTOMER TEST MODE (CTM) V(CTM) Customer test mode entry voltage at VDD VDD > VC5 + V(CTM), TA = 25°C 8.5 tCTM_ENTRY (3) Delay time to enter and exit Customer Test Mode VDD > VC5 + V(CTM), TA = 25°C 50 tCTM_DELAY (3) Delay time of faults while in Customer Test Mode TA = 25°C tCTM_OC_REC (1) (3) Fault recovery time of OCD1, OCD2, and SCD 1 s and 8 s options, TA = 25°C faults while in Customer Test Mode 10 V ms 200 ms 100 ms Based on a 10-KΩ pull-up and 103AT thermistor Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 9 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 (2) (3) Not production tested parameters. Specified by design The device is in a no fault state prior to entering Customer Test Mode. 7.6 Timing Requirements MIN TYP MAX 0.5-s delay option 0.4 0.5 0.8 1-s delay option 0.8 1 1.4 2-s delay option 1.8 2 2.7 4.5-s delay option 4 4.5 5.2 1-s delay option 0.8 1 1.5 2-s delay option 1.8 2 2.7 4.5-s delay option 4 4.5 5.5 UNIT PROTECTION DELAYS (2) tOVn_DELAY Overvoltage detection delay time s tUVn_DELAY Undervoltage detection delay time 8 9 10.2 tOWn_DELAY Open-wire detection delay time 3.6 4.5 5.3 s tOTC_DELAY Overtemperature charge detection delay time 3.6 4.5 5.3 s tUTC_DELAY Undertemperature charge detection delay time 3.6 4.5 5.3 s tOTD_DELAY Overtemperature discharge detection delay time 3.6 4.5 5.3 s tUTD_DELAY Undertemperature discharge detection delay time 3.6 4.5 5.3 s 10-ms delay option 8 10 15 20-ms delay option 17 20 26 45-ms delay option 36 45 52 9-s delay option tOCD1_DELAY Overcurrent 1 detection delay time 90-ms delay option 78 90 105 180-ms delay option 155 180 205 350-ms delay option 320 350 405 700-ms delay option 640 700 825 1420-ms delay option 1290 1420 1620 4 5 8 10-ms delay option 8 10 15 20-ms delay option 17 20 26 45-ms delay option 36 45 52 90-ms delay option 78 90 105 180-ms delay option 155 180 205 350-ms delay option 320 350 405 5-ms delay option tOCD2_DELAY tSCD_RELAY tCD_REC 10 Overcurrent 2 detection delay time 700-ms delay option 640 700 825 Short-circuit detection delay time 360-µs delay option 220 400 610 Overcurrent 1, Overcurrent 2, and Short-circuit recovery delay time 1-s option 0.8 1 1.4 9-s option 8 9 10.2 Submit Document Feedback s ms ms µs s Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 7.7 Typical Characteristics 7.5 0.25 0.2 Shutdown Current (PA) Normal Mode Current (PA) 7 6.5 6 5.5 5 0.15 0.1 0.05 4.5 4 -40 -15 10 35 Temperature (qC) 60 0 -40 85 D001 15 10 10 5 60 85 D002 0 UV Error (mV) -5 -10 -10 -15 -15 -20 -40 -15 10 35 Temperature (qC) 60 -20 -40 85 -15 10 35 Temperature (qC) D003 85 D004 Figure 7-4. UV Error at 2.8-V Threshold Figure 7-3. OV Error at 4.25-V Threshold 0.2 0.1 60 4.0 2.5 0.05 3.5 0.0 2 ±0.2 -0.1 ±0.4 -0.15 -0.2 ±0.6 -0.25 Error (in mV) Error (in %) -0.3 -0.35 ±40 ±20 0 20 40 60 3.0 2.5 1.5 2.0 1 1.5 1.0 0.5 ±0.8 Error (in mV) Error (in %) 0 ±1.0 80 Temperature (ºC) OCD2 Error (mV) -0.05 OCD1 Error (%) OCD1 Error (mV) 0 ±40 ±20 0 20 40 60 0.5 0.0 80 Temperature (ºC) C001 Figure 7-5. OCD1 Error at 40-mV Threshold OCD2 Error (%) OV Error (mV) 5 -5 10 35 Temperature (qC) Figure 7-2. Shutdown Current Figure 7-1. NORMAL Mode Current 0 -15 C002 Figure 7-6. OCD2 Error at 60-mV Threshold Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 11 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 1.6 2.5 1.4 1.2 1.0 1.5 0.8 1 0.6 SCD Error(%) SCD Error (mV) 2 0.4 0.5 Error (in mV) Error (in %) 0 ±40 ±20 0 20 40 60 0.2 0.0 80 Temperature (ºC) C003 Figure 7-7. SCD Error at 160-mV Threshold 12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 8 Detailed Description 8.1 Overview The BQ77904 and BQ77905 families are full-feature stackable primary protectors for Li-ion/Li-Polymer batteries. The devices implement a suite of protections, including: • Cell voltage: overvoltage, undervoltage • Current: Overcurrent discharge 1 and 2, short circuit discharge • Temperature: overtemperature and undertemperature in charge and discharge • PCB: cell open-wire connection • FET body diode protection Protection thresholds and delays are factory-programmed and available in a variety of configurations. The BQ77904 supports 3-series-to–4-series cell configuration and BQ77905 supports 3-series-to–5-series cell configuration. Up to four devices can be stacked to support ≥6-series cell configurations, providing protections up to 20-series cell configurations. The device has built-in CHG and DSG drivers for low-side N-channel FET protection, which automatically open up the CHG and/or DSG FETs after protection delay time when a fault is detected. A set of CHG/DSG overrides is provided to allow disabling of CHG and/or DSG driver externally. Although the host system can use this function to disable the FETs' control, the main use of these pins is to channel down the FET control signal from the upper device to the lower device in a cascading configuration in ≥6-series battery packs. 8.1.1 Device Functionality Summary In this and subsequent sections, a number of abbreviations are used to identify specific fault conditions. The fault descriptor abbreviations and their meanings are defined in Table 8-1. Table 8-1. Device Functionality Summary FAULT DESCRIPTOR OV FAULT DETECTION THRESHOLD and DELAY OPTIONS FAULT RECOVERY METHOD and SETTING OPTIONS Overvoltage 3 V to 4.575 V (25-mV step) 0.5, 1, 2, 4.5 s Hysteresis 0, 100, 200, 400 mV UV Undervoltage 1.2 V to 3 V (100-mV step for < 2.5 V, 50-mV step for ≥ 2.5 V) 1, 2, 4.5, 9 s Hysteresis OR Hysteresis + Load Removal 200, 400 mV OW Open wire (cell to pcb disconnection) 0 (disabled), 100, 200, or 400 nA 4.5 s Restore bad VCx to pcb connection VCx > VOW OTD(1) Overtemperature during discharge 65°C or 70°C 4.5 s Hysteresis 10°C OTC(1) Overtemperature during charge 45°C or 50°C 4.5 s Hysteresis 10°C UTD(1) Undertemperature during discharge –20°C or –10°C 4.5 s Hysteresis 10°C UTC (1) Undertemperature during charge –5°C or 0°C 4.5s Hysteresis 10°C OCD1 Overcurrent1 during discharge 10 mV to 85 mV (5-mV step) 10, 20, 45, 90, 180, 350, 700, 1420 ms OCD2 Overcurrent1 during discharge 20 mV to 170 mV (10-mV step) 5, 10, 20, 45, 90, 180, 350, 700 ms Delay OR Delay + Load Removal OR Load Removal 1 s or 9 s SCD Short circuit discharge 40 mV to 340 mV (20-mV step) 360 µs CTRC CHG signal override control Disable via external control or via CHGU signal from the upper device in the stack configuration. tCTRDEG_ON Enable via external control or via CHGU signal from the upper device in the stack configuration. tCTRDEG_OFF CTRD DSG signal override control Disable via external control or via DSG signal from the upper device in the stack configuration. tCTRDEG_ON Enable via external control or via DSG signal from the upper device in the stack configuration. tCTRDEG_OFF (1) These thresholds are target based on temperature, but they are dependent on external components that could vary based on customer selection. The circuit is based on a 103AT NTC thermistor connected to TS and VSS, and a 10-kΩ resistor connected to VTB and TS. Actual thresholds must be determined in mV. Refers to the overtemperature and undertemperature mV threshold in the Electrical Characteristics table. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 13 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 8.2 Functional Block Diagram VDD CCFG CONFIG LOGIC BG REFERENCE BIAS AVDD VDIG REGULATOR AND SHUTDOWN VTB POR TS VC5 VC4 EEPROM MUX VC3 COMPARE 1 CTRC VC2 STACK INTERFACE CTRD VC1 CONTROL LOGIC OPEN WIRE CHG CHG DRIVER CHGU MUX COMPARE 2 DSG DRIVER DSG LOAD DETECTION LD SRP STATE COMPARE SRN CLOCK and WDT AVSS DVSS Copyright © 2018, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 Protection Summary The BQ77904 and BQ77905 have two comparators. Both are time multiplexed to detect all protection fault conditions. Each of the comparators runs on a time-multiplexed schedule and cycles through the assigned 14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 protection-fault checks. Comparator 1 checks for OV, UV, and OW protection faults. Comparator 2 checks for OCD1, OCD2, SCD, OTC, OTD, UTC, and UTD protection faults. For OV, UV, and OW protection faults, every cell is checked individually in round-robin fashion, starting with cell 1 and ending with the highest-selected cell. The number of the highest cell is configured using the CCFG pin. Devices can be ordered with various timing and hysteresis settings. See the Section 5 section for a summary of options available per device type. Check OV VCELL1 Check OV VCELL2 n = the highest call configured by CCFG pin Check OV VCELLn NO Time to check UV? Time to check OW? YES NO YES Check OW VCELLx, x = x +1 Check UV VCELL1 Check UV VCELL2 x starts from 1 at POR Reset x = 1, if x > the highest cell configured via CCFG pin Check UV VCELLn Turn off Comp1 until next cycle start Figure 8-1. Comparator 1 Flowchart Check SCD Time to check OCD1? NO YES Check OCD1 Time to check OCD2? NO Time to check OT? YES Check OCD2 NO Time to check UT? YES YES Check OT Check UT NO Figure 8-2. Comparator 2 Flowchart 8.3.2 Fault Operation 8.3.2.1 Operation in OV An OV fault detection is when at least one of the cell voltages is measured above the OV threshold, VOV. The CHG pin is turned off if the fault condition lasts for a duration of OV Delay, tOVn_DELAY. The OV fault recovers when the voltage of the cell in fault is below the (OV threshold – OV hysteresis, VHYS_OV) for a time of OV Delay. The BQ77904 and BQ77905 assume OV fault after device reset. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 15 BQ77904, BQ77905 www.ti.com SLUSCM3K – JUNE 2016 – REVISED JULY 2020 8.3.2.2 Operation in UV An UV fault detection is when at least one of the cell voltages is measured below the UV threshold, VUV. The DSG is turned off if the fault condition lasts for a duration of UV Delay, tUVn_DELAY. The UV fault recovers when: • • The cell voltage in fault is above the (UV threshold + UV hysteresis, VHYS_UV) for a time of UV Delay only OR The cell voltage in fault is above the (UV threshold + UV hysteresis) for a time of UV Delay AND load removal is detected. If load removal is enabled as part of the UV recovery requirement, the CHG FET RGS value should change to around 3 MΩ. Refer to the Section 9.1.1.4 section of this document for more detail. This requirement applies to load removal enabled for UV recovery only. Therefore, if load removal is selected for current fault recovery, but not for the UV recovery, a lower CHG FET RGS value (typical of 1MΩ) can be used to reduce the CHG FET turn off time. To minimize supply current, the device disables all overcurrent detection blocks any time the DSG FET is turned off (due to a fault or CTRD being driven to the DISABLED state). Upon recovery from a fault or when CTRD is no longer externally driven, all overcurrent detection blocks reactivate before the DSG FET turns back on. 8.3.2.3 Operation in OW An OW fault detection is when at least one of the cell voltages is measured below the OW threshold, VOW. Both CHG and DSG are turned off if the fault condition lasts for a duration of OW Delay, tOWn_DELAY. The OW fault recovers when the cell voltage in fault is above the OW threshold + OW hysteresis, VOW_HYS for a time of OW Delay. The tOWn_DELAY time starts when voltage at a given cell is detected below the VOW threshold and is not from the time that the actual event of open wire occurs. During an open-wire event, it is common that the device detects an undervoltage and/or overvoltage fault before detecting an open-wire fault. This may happen due to the differences in fault thresholds, fault delays, and the VCx pin filter capacitor values. To ensure both CHG and DSG return to normal operation mode, the OW, OV, and UV faults recovery conditions must be met. 8.3.2.4 Operation in OCD1 An OCD1 fault is when the discharge load is high enough that the voltage across the RSNS resistor, (VSRP-VSRN), is measured below the OCD1 voltage threshold, VOCD1. Both CHG and DSG are turned off if the fault condition lasts for a duration of OCD1 Delay, tOCD1_DELAY. The OCD1 fault recovers when: • • • Load removal is detected only, VLD < VLDT OR Overcurrent Recovery Timer, tCD_REC, expiration only OR Overcurrent Recovery Timer expiration and load removal are detected. 8.3.2.5 Operation in OCD2 An OCD2 fault is when the discharge load is high enough that the voltage across the RSNS resistor, (VSRP-VSRN), is measured below the OCD2 voltage threshold, VOCD2. Both CHG and DSG are turned off if the fault condition lasts for a duration of OCD2 Delay, tOCD2_DELAY. The OCD2 fault recovers when: • • • Load removal detected only, VLD < VLDT OR Overcurrent Recovery Timer, tCD_REC, expiration only OR Overcurrent Recovery Timer expiration and load removal are detected. 8.3.2.6 Operation in SCD An SCD fault is when the discharge load is high enough that the voltage across the RSNS resistor, (VSRP-VSRN), is measured below the SCD voltage threshold, VSCD. Both CHG and DSG are turned off if the fault condition lasts for a duration of SCD Delay, tSCD_DELAY. The SCD fault recovers when: 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ77904 BQ77905 BQ77904, BQ77905 www.ti.com • • • SLUSCM3K – JUNE 2016 – REVISED JULY 2020 Load removal detected only, VLD < VLDT OR Overcurrent Recovery Timer, tCD_REC, expiration only OR Overcurrent Recovery Timer expiration and load removal are detected. 8.3.2.7 Overcurrent Recovery Timer The timer expiration method activates an internal recovery timer as soon as the initial fault condition exceeds the