Datasheet · 2026

TI BQ25756 1–14-Cell Bidirectional Buck-Boost Battery Charge Controller — Datasheet (SLUSEN5A)

The on-board PD-input charger option.

Author: Texas Instruments
Year: 2026
Type: Datasheet
Credit: Texas Instruments (ti.com)

charger
buck-boost
usb pd

BQ25756 SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 BQ25756 Standalone/I2C Controlled, 1- to 14-Cell Bidirectional Buck-Boost Battery Charge Controller 1 Features 2 Applications • • • • • • • • • • • • • • • • • • Wide input voltage operating range: 4.2V to 70V Wide battery voltage operating range: up to 70V with multi-chemistry support: – 1- to 14-cell Li-ion charge profile – 1- to 16-cell LiFePO4 charge profile Synchronous buck-boost charge controller with NFET drivers – Adjustable switching frequency from 200kHz to 600kHz – Optional synchronization to external clock – Integrated loop compensation with soft start – Optional gate driver supply input for optimized efficiency Automatic maximum power point tracking (MPPT) for solar charging Bidirectional converter operation (Reverse Mode) supporting USB-PD Extended Power Range (EPR) – Adjustable input voltage (VAC) regulation from 3.3V to 65V with 20mV/step – Adjustable input current regulation (RAC_SNS) from 400mA to 20A with 50mA/step using 2mΩ resistor High accuracy – ±0.5% charge voltage regulation – ±3% charge current regulation – ±3% input current regulation I2C controlled for optimal system performance with resistor-programmable option – Hardware adjustable input and output current limits Integrated 16-bit ADC for voltage, current, and temperature monitoring High safety integration – Adjustable input overvoltage and undervoltage protection – Battery Overvoltage and overcurrent protection – Charging safety timer – Battery short protection – Thermal shutdown Status outputs – Adapter present status (PG) – Charger Operation status (STAT1, STAT2) Package – 36-pin 6mm × 5mm QFN Kick eScooter, eBike Cordless power tool, Garden tool Robotic lawn mower Portable power station Cordless vacuum cleaner, Vacuum robot Solar charger USB-PD EPR (Extended Power Range) 3 Description The BQ25756 is a wide input voltage, switchedmode buck-boost Li-Ion, Li-polymer, or LiFePO4 battery charge controller with bidirectional power flow support. The device offers high-efficiency battery charging over a wide voltage range with accurate charge current and charge voltage regulation, in addition to automatic charge preconditioning, termination, and charge status indication. The device integrates all the loop compensation for the buckboost converter, thereby providing a high density solution with ease of use. In reverse mode, the device draws power from the battery and regulates the input terminal voltage with an added constant current loop for protection, supporting USB-PD EPR power profile. Package Information PART NUMBER BQ25756 (1) (2) PACKAGE(1) PACKAGE SIZE(2) BODY SIZE (NOM) 6.0mm × 5.0mm 6.0 x 5.0mm2 VQFN (36) For all available packages, see Section 12. The package size (length × width) is a nominal value and includes pins, where applicable. OPTIONAL INPUT BIDIRECTIONAL POWER FLOW HIDRV1 SW1 LODRV1 SW2 HIDRV2 LODRV2 ACN ACP SYSTEM + CSYS VAC SRP SRN FB REGN REGN BATTERY TS Host ILIM_HIZ ICHG I2C PGND BQ25756 Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Pin Configuration and Functions...................................3 5 Specifications.................................................................. 6 5.1 Absolute Maximum Ratings........................................ 6 5.2 ESD Ratings............................................................... 6 5.3 Recommended Operating Conditions.........................7 5.4 Thermal Information....................................................7 5.5 Electrical Characteristics.............................................8 5.6 Timing Requirements................................................ 14 5.7 Typical Characteristics ............................................. 15 6 Detailed Description......................................................18 6.1 Overview................................................................... 18 6.2 Functional Block Diagram......................................... 19 6.3 Feature Description...................................................20 6.4 Device Functional Modes..........................................36 6.5 BQ25756 Registers...................................................37 2 7 Application and Implementation.................................. 59 7.1 Application Information............................................. 59 7.2 Typical Applications.................................................. 59 8 Power Supply Recommendations................................70 9 Layout.............................................................................71 9.1 Layout Guidelines..................................................... 71 9.2 Layout Example........................................................ 72 10 Device and Documentation Support..........................74 10.1 Device Support....................................................... 74 10.2 Receiving Notification of Documentation Updates..74 10.3 Support Resources................................................. 74 10.4 Trademarks............................................................. 74 10.5 Electrostatic Discharge Caution..............................74 10.6 Glossary..................................................................74 11 Revision History.......................................................... 74 12 Mechanical, Packaging, and Orderable Information.................................................................... 75 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 4 Pin Configuration and Functions FSW_ ACOV ACUV SYNC 36 35 34 VAC VAC NC ACP ACN 33 32 31 30 29 SCL 1 28 SW1 SDA 2 27 HIDRV1 INT 3 26 BTST1 STAT1 4 25 LODRV1 STAT2 5 24 REGN 23 DRV_SUP 37 PG 6 CE 7 22 PGND TS 8 21 LODRV2 ICHG 9 20 BTST2 ILIM_HIZ 10 19 HIDRV2 PGND 11 12 13 14 15 16 17 18 FBG FB SRN SRP NC NC PGND SW2 Figure 4-1. BQ25756 , RRV Package 36-pin VQFN Top View Table 4-1. Pin Functions PIN NAME NO. I/O DESCRIPTION SCL 1 I I2C Interface Clock – Connect SCL to the logic rail through a 10kΩ resistor. SDA 2 IO I2C Interface Data – Connect SDA to the logic rail through a 10kΩ resistor. INT 3 O Open Drain Interrupt Output – Connect the INT pin to a logic rail via 10kΩ resistor. The INT pin sends an active low, 256μs pulse to host to report the charger device status and faults. O Open Drain Charge Status 1 Output – STAT1 and STAT2 indicate various charger operations, see Table 6-6. Connect to the pull up rail via 10kΩ resistor. The STAT1, STAT2 pin functions can be disabled when DIS_STAT_PINS bit is set to 1. When disabled, this pin can be used as a general purpose indicator via the FORCE_STAT1_ON bit. STAT1 4 STAT2 5 O Open Drain Charge Status 2 Output – STAT1 and STAT2 indicate various charger operations, see Table 6-6. Connect to the pull up rail via 10kΩ resistor. The STAT1, STAT2 pin functions can be disabled when DIS_STAT_PINS bit is set to 1. When disabled, this pin can be used as a general purpose indicator via the FORCE_STAT2_ON bit. PG 6 O Open Drain Active Low Power Good Indicator – Connect to the pull up rail via 10kΩ resistor. LOW indicates a good input source if VAC is within the programmed ACUV / ACOV operating window. The PG pin function can be disabled when DIS_PG_PIN bit is set to 1. When disabled, this pin can be used as a general purpose indicator via the FORCE_STAT3_ON bit. CE 7 IO Active Low Charge Enable Pin – Battery charging is enabled when EN_CHG bit is 1 and CE pin is LOW. CE pin must be pulled HIGH or LOW, do not leave floating. The CE pin function can be disabled when DIS_CE_PIN bit is set to 1. When disabled, this pin can be used as a general purpose indicator via the FORCE_STAT4_ON bit. Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 3 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 Table 4-1. Pin Functions (continued) PIN NAME TS 8 ICHG 9 I/O DESCRIPTION I Temperature Qualification Voltage Input – Connect a negative temperature coefficient thermistor. Program temperature window with a resistor divider from REGN to TS to PGND. Charge suspends when TS pin voltage is out of range. Recommend 103AT-2 10-kΩ thermistor. I Charge Current Limit Setting – ICHG pin sets the maximum charge current, and can be used to monitor the charge current. A programming resistor to PGND is used to set the charge current limit as ICHG = KICHG / RICHG. When the device is under charge current regulation, the voltage at ICHG pin is VREF_ICHG. When ICHG pin voltage is less than VREF_ICHG, the actual charge current can be calculated as: IBAT = KICHG x VICHG / ( RICHG x VREF_ICHG). The actual charge current limit is the lower of the limits set by ICHG pin or the ICHG_REG register bits. This pin function can be disabled when EN_ICHG_PIN bit is 0. If ICHG pin is not used, this pin must be pulled to PGND, do not leave floating. ILIM_HIZ 10 I Input Current Limit Setting and HIZ Mode Control Pin – ILIM_HIZ pin sets the maximum input current limit, can be used to monitor the input current and can be pulled HIGH to force device into HIZ mode. A programming resistor to PGND is used to set the input current limit as ILIM = KILIM / RILIM. When the device is under input current regulation, the voltage at ILIM_HIZ pin is VREF_ILIM. When ILIM_HIZ pin voltage is less than VREF_ILIM, the actual input current can be calculated as: IAC = KILIM x VILIM / ( RILIM x VREF_ILIM). The actual input current limit is the lower of the limits set by ILIM_HIZ pin or the IAC_DPM register bits. This pin function can be disabled when EN_ILIM_HIZ_PIN bit is 0. If ILIM_HIZ pin is not used, this pin must be pulled to PGND, do not leave floating. FBG 11 I Voltage Feedback Divider Return – Connect to the bottom of battery feedback resistor. When charging, this pin is driven to PGND internally. When input voltage is outside of the ACUV / ACOV operating window, this pin is high-impedance, minimizing battery leakage current. FB 12 I Charge Voltage Analog Feedback Adjustment – Connect the output of a resistive voltage divider from the battery terminals to this node to adjust the output battery regulation voltage. SRN 13 I Charge Current-Sense Resistor, Negative Input – A 0.47-μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. An optional 0.1-μF ceramic capacitor is placed from the SRN pin to PGND for common-mode filtering. SRP 14 I Charge Current-Sense Resistor, Positive Input – A 0.47-μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. A 0.1-μF ceramic capacitor is placed from the SRP pin to PGND for common-mode filtering. NC 15 - No Connect - Leave this pin floating, do not tie to PGND NC 16 - No Connect - Leave this pin floating, do not tie to PGND PGND 17 - Tie this pin directly to PGND . SW2 18 P Boost Side Half Bridge Switching Node – Connect to the source of boost HS FET and the drain of boost LS FET. Connect the inductor between SW1 and SW2. HIDRV2 19 O Boost Side High-Side Gate Driver – Connect to the boost high-side N-channel MOSFET gate. BTST2 20 P Boost Side High-Side Power MOSFET Gate Driver Power Supply – Connect a capacitor between BTST2 and SW2 to provide bias to the high-side MOSFET gate driver. LODRV2 21 O Boost Side Low-Side Gate Driver – Connect to the boost low-side N-channel MOSFET gate. PGND 22 P Power Ground Return – The high current ground connection for the low-side gate drivers. P Charger Gate Drive Supply Input – Voltage on this pin is used to drive the gates of buck-boost converter switching FET. Connect a 4.7μF ceramic capacitor from DRV_SUP to power ground. REGN LDO voltage can be used as the gate driver supply for all switching FETs by connecting REGN to DRV_SUP pin. In high-voltage applications, it is possible to directly provide the DRV_SUP voltage with an external supply up to 12V to achieve higher switching efficiency. See Section 6.3.3.2 for more details. DRV_SUP 4 NO. 23 REGN 24 P Charger Internal Linear Regulator Output – Connect a 4.7μF ceramic capacitor from REGN to power ground. REGN LDO voltage can be used as the gate driver supply for all switching FETs by connecting REGN to DRV_SUP pin. In high-voltage applications, it is possible to directly provide the DRV_SUP voltage with an external supply up to 12V to achieve higher switching efficiency. See Section 6.3.3.2 for more details. LODRV1 25 O Buck Side Low-Side Gate Driver – Connect to the buck low-side N-channel MOSFET gate. BTST1 26 P Buck Side High-Side Power MOSFET Gate Driver Power Supply – Connect a capacitor between BTST1 and SW1 to provide bias to the high-side MOSFET gate driver. HIDRV1 27 O Buck Side High-Side Gate Driver – Connect to the buck high-side N-channel MOSFET gate. Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 Table 4-1. Pin Functions (continued) PIN NAME NO. I/O DESCRIPTION SW1 28 P Buck Side Half Bridge Switching Node – Connect to the source of buck HS FET and the drain of buck LS FET. Connect the inductor between SW1 and SW2. ACN 29 I Adapter Current-Sense Resistor, Negative Input – A 0.47μF ceramic capacitor is placed from ACN to ACP to provide differential-mode filtering. An optional 0.1μF ceramic capacitor is placed from the ACN pin to PGND for common-mode filtering. ACP 30 I Adapter Current-Sense Resistor, Positive Input – A 0.47μF ceramic capacitor is placed from ACN to ACP to provide differential-mode filtering. A 0.1μF ceramic capacitor is placed from the ACP pin to PGND for common-mode filtering NC 31 - No Connect - Leave this pin floating, do not tie to PGND P Input Voltage Detection and Power – Connect a 1µF capacitor from pin to PGND. Pin 33 is the input bias to power the IC, and ACOV/ACUV resistor divider must be connected relative to pin 33. When Reverse Mode is enabled, pin 32 is regulated to VAC_REV. 32 VAC 33 ACUV 34 I AC Undervoltage Comparator Input – Connect a resistor divider from VAC to PGND to program the undervoltage protection. When this pin falls below VREF_ACUV, the device stops charging. The hardware limit for input voltage regulation reference is VACUV_DPM. The actual input voltage regulation is the higher of the pin-programmed value and the VAC_DPM register value. If ACUV programming is not used, pull this pin to VAC, do not leave floating. ACOV 35 I AC Overvoltage Comparator Input – Connect a resistor divider from VAC to PGND to program the overvoltage protection. When this pin rises above VREF_ACOV, the device stops charging. If ACOV programming is not used, pull this pin to PGND, do not leave floating. FSW_SYNC 36 I Switching Frequency and Synchronization Input – An external resistor is connected to the FSW_SYNC pin and PGND to set the nominal switching frequency. This pin can also be used to synchronize the PWM controller to an external clock with 200kHz to 600kHz frequency. Thermal Pad 37 P Exposed pad beneath the IC – Always solder the thermal pad to the board, and have vias on the thermal pad plane star-connecting to PGND and ground plane for high-current power converter. It also serves as a thermal pad to dissipate the heat. Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 5 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT –0.3 85 V SW1, SW2 –2 85 V SW1, SW2 (40ns transient) –4 85 V PG –0.3 40 V BTST1, HIDRV1 with respect to SW1 –0.3 14 V Voltage BTST2, HIDRV2 with respect to SW2 –0.3 14 V Voltage ACP with respect to ACN, SRP with respect to SRN –0.3 0.3 V Voltage CE, FSW_SYNC, ICHG, ILIM_HIZ, INT, REGN, SCL, SDA, MODE, STAT1, STAT2, TS –0.3 6 V Output Sink Current CE, PG, STAT1, STAT2 5 mA TJ Junction temperature –40 150 °C Tstg Storage temperature –65 150 °C Voltage VAC, ACUV, ACOV, ACP, ACN, SRP, SRN, FB, FBG Voltage Voltage Voltage Voltage (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. 5.2 ESD Ratings VALUE V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/ JEDEC JS-001, all pins(1) ±2000 Charged device model (CDM), per ANSI/ESDA/ JEDEC JS-002, all pins(2) ±500 UNIT V (1) (2) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process. 6 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT 4.2 NOM 70 V 0 70 V 4.0 12 V 200 600 kHz –40 125 °C –40 105 VAC Input voltage VBAT Battery voltage VDRV_SUP DRV_SUP pin direct drive voltage range FSW Switching Frequency TJ Junction temperature TA Ambient temperature CVAC VAC capacitor 1 µF CIN Buck input capacitance (minimum value after derating) 80 µF COUT Buck output capacitance (minimum value after derating) 80 µF CREGN REGN capacitor (nominal value before derating) 4.7 µF CDRV_SUP DRV_SUP capacitor (nominal value before derating) 4.7 L Switched Inductor 2.2 RDCR Inductor DC resistance 1.75 RAC_SNS Input current sense resistor 0(1) RBAT_SNS Battery current sense resistor RICHG ICHG programming pulldown resistor 0.0(2) 100 kΩ ILIM_HIZ programming pulldown resistor 0.0(3) 50 kΩ RILIM_HIZ (1) (2) (3) °C µF 5 15 µH 60 mΩ 10 mΩ 5 mΩ When RAC_SNS is 0mΩ, input current limit function is disabled When RICHG is pulled to GND, the hardware charge current limit is disabled, actual charge current is controlled by the ICHG_REG register setting When RILIM_HIZ is pulled to GND, the hardware input current limit is disabled, actual input current is controlled by the IAC_DPM register setting 5.4 Thermal Information BQ25756 THERMAL METRIC(1) RRV UNIT 36 PINS RθJA Junction-to-ambient thermal resistance (JEDEC(1)) 29.4 °C/W RθJC(top) Junction-to-case (top) thermal resistance 18.8 °C/W RθJB Junction-to-board thermal resistance 9.9 °C/W ΨJT Junction-to-top characterization parameter 0.2 °C/W ΨJB Junction-to-board characterization parameter 9.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 2.5 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note. Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 7 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.5 Electrical Characteristics VAC = ACP = ACN = SYS = SRP = SRN = 28V, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VBAT = 28V, VAC = 0V, ADC_EN = 0, TJ < 105 °C 17 µA VBAT = 28V, VAC = 0V, ADC_EN = 1, TJ < 105 °C 500 700 µA QUIESCENT CURRENTS IQ_BAT Quiescent battery current with BATFET on (ISRN + ISRP) IQ_VAC Quiescent input current (IVAC) Not switching 0.75 1 mA IQ_REV Quiescent battery current in Reverse mode (ISRN + ISRP) Not switching 0.75 1 mA 70 V VAC / BAT POWER UP VVAC_OP VAC operating range VVAC_OK VAC converter enable threshold VAC rising, no battery 4.2 VVAC_OKZ VAC converter disable threshold VAC falling, no battery VREF_ACUV ACUV comparator threshold to enter VAC_UVP VACUV falling VREF_ACUV_HYS ACUV comparator threshold hysteresis VACUV rising VVAC_INT_OV VAC internal threshold to enter VAC_OVP IN rising 72 74 76 V VVAC_INT_OVZ VAC internal thresholds to exit VAC_OVP IN falling 69 71 73 V VREF_ACOV ACOV comparator threshold to enter VAC_OVP VACOV rising 1.184 1.2 1.206 V VREF_ACOV_HYS ACOV comparator threshold hysteresis VACOV falling 4.2 1.095 V 1.1 3.5 V 1.106 V 50 mV 50 mV CHARGE VOLTAGE REGULATION VVFB_RANGE Feedback voltage range 1.504 VVFB_NOM Nominal feedback voltage VFB_REG = 0x10 VVFB_ACC Feedback voltage regulation accuracy TJ = 0°C to 85°C –0.5 TJ = -40°C to 125°C –0.7 RFBG FBG resistance to PGND IFBG = 1mA 1.566 V 0.5 % 0.7 % 55 Ω 20 A 3 % 3 % 5 % 52 Ax kΩ 1.536 33 V FAST CHARGECURRENT REGULATION ICHG_REG_RANGE ICHG_REG_ACC Charge current regulation range 0.4 I2C setting charge current regulation accuracy KICHG Hardware charge current limit set factor (Amperes of charge current per kΩ on ICHG pin) VREF_ICHG ICHG pin voltage when ICHG pin is in regulation 15 RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ICHG_REG = 0x012C –3 RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ICHG_REG = 0x0064 –3 RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ICHG_REG = 0x0028 –5 RBAT_SNS = 5mΩ, RICHG = 10kΩ, 5kΩ, and 3.33kΩ A 5 A 2 48 50 A 2.0 V PRE-CHARGE CURRENT REGULATION IPRECHG_RANGE 8 Precharge current regulation range VFB < VBAT_LOWV * VVFB_REG Submit Document Feedback 0.25 10 A Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.5 Electrical Characteristics (continued) VAC = ACP = ACN = SYS = SRP = SRN = 28V, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted) PARAMETER IPRECHG_ACC TEST CONDITIONS I2C setting precharge current accuracy MIN TYP MAX UNIT 3.0 RBAT_SNS = 5mΩ, VFB < VBAT_LOWV * VVFB_REG. IPRECHG = 0x003C –4 RBAT_SNS = 5mΩ, VFB < VBAT_LOWV * VVFB_REG. IPRECHG[1:0] = 0x0014 –10 RBAT_SNS = 5mΩ, VFB < VBAT_LOWV * VVFB_REG. IPRECHG[1:0] = 0x000A VFB = VVFB_REG A 4 % 10 % –30 30 % 0.25 10 A 7 % 20 % 50 % 1.0 A 0.50 A CHARGE TERMINATION ITERM_RANGE ITERM_ACC Termination current range 1.5 A RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V . ITERM = 0x001E –7 RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ITERM = 0x000A –20 RBAT_SNS = 5mΩ, VBAT = 12V, 36V, 55V. ITERM = 0x0005 –50 Trickle charge to pre-charge transition VSRN rising 2.8 3 3.2 V Pre-charge to trickle charge transition VSRN falling 2.2 2.4 2.6 V VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 3 69.0 71.7 73.8 % VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 2 64.3 66.7 69.0 % VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 1 52 55 58 % VFB rising, as percentage of VFB_REG, VBAT_LOWV[2:0] = 0 27 30 33 % Termination current accuracy 0.50 A 0.250 A BATTERY VOLTAGE COMPARATORS VBAT_SHORT VBAT_LOWV VBAT_LOWV_HYS Pre-charge to fast-charge transition BAT_LOWV hysteresis VFB falling, as percentage of VFB_REG, VRECHG[1:0] = 3 VRECHG VFB falling, as percentage of VFB_REG, Battery recharge threshold for Li-Ion VRECHG[1:0] = 2 and LiFePO4 VFB falling, as percentage of VFB_REG, VRECHG[1:0] = 1 VFB falling, as percentage of VFB_REG, VRECHG[1:0] = 0 5 % 97.6 % 95.2 % 94.3 % 93.0 % INPUT CURRENT REGULATION RAC_SNS = 2mΩ, IAC_DPM = 0x00A0 IIREG_DPM_ACC I2C setting input current regulation accuracy in forward mode RAC_SNS = 2mΩ, IAC_DPM = 0x0050 RAC_SNS = 2mΩ, IAC_DPM = 0x0028 KILIM Hardware input current limit set RAC_SNS = 2mΩ, RILIM = 5kΩ, 2.5kΩ, and factor (Amperes of input current per 1.67kΩ kΩ on ILIM_HIZ pin) 20 –3 A 3 % 4 % 7 % 52 Ax kΩ 10 –4 A 5 –7 48 50 A Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 9 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.5 Electrical Characteristics (continued) VAC = ACP = ACN = SYS = SRP = SRN = 28V, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted) PARAMETER VREF_ILIM_HIZ ILIM_HIZ pin voltage when ILIM_HIZ pin is in regulation VIH_ILIM_HIZ ILIM_HIZ input high threshold to enter HIZ mode TEST CONDITIONS MIN TYP MAX UNIT 2.0 VILIM_HIZ rising V 3.7 V INPUT VOLTAGE REGULATION VVREG_DPM_RANGE Input voltage DPM regulation range VVREG_DPM_ACC VVREG_DPM_ACC I2C setting input voltage regulation accuracy I2C setting input voltage regulation 4.2 V 2 % 2 % 2 % 1.222 V 65 V 2 % 2 % 2 % 2 % 38 VAC_DPM = 0x076C –2 V 25 VAC_DPM = 0x04E2 –2 accuracy in forward mode V 19 VAC_DPM = 0x03B6 VACUV_DPM 65 –2 ACUV pin voltage when in VDPM regulation 1.198 1.210 V REVERSE MODE VOLTAGE REGULATION VREV_RANGE VAC Voltage regulation range in Reverse mode 3.3 48 VAC_REV = 0x0960 VREV_ACC –2 Voltage regulation accuracy in Reverse mode 28 VAC_REV = 0x0578 –2 V 15 VAC_REV = 0x02EE VREV_ACC V –2 VAC Voltage regulation accuracy in Reverse mode V 5 VAC_REV = 0x00FA –2 V REVERSE MODE CURRENT REGULATION IIREV_ACC Input current regulation accuracy in Reverse mode 20 RAC_SNS = 2mΩ, IAC_REV = 0x00A0 –3.5 A 3.5 5 RAC_SNS = 2mΩ, IAC_REV = 0x0028 –5.5 % A 5.5 % CHARGE MODE BATTERY-PACK NTC MONITOR VT1_RISE TS pin voltage rising T1 threshold, charge suspended above this voltage. As Percentage to REGN, TS_T1=0°C w/ 103AT 72.75 73.25 73.85 % VT1_FALL TS pin voltage falling T1 threshold, charge re-enabled below this voltage. As Percentage to REGN, TS_T1=0°C w/ 103AT 71.5 72 72.5 % VT2_RISE TS pin voltage rising T2 threshold, charge back to reduced ICHG above this voltage As Percentage to REGN, TS_T2=10°C w/ 103AT 67.75 68.25 68.75 % VT2_FALL TS pin voltage falling T2 threshold. Charge back to normal below this voltage As Percentage to REGN, TS_T2=10°C w/ 103AT 66.45 66.95 67.45 % VT3_FALL TS pin voltage falling T3 threshold, charge to ICHG and reduced VFB_REG below this voltage. As Percentage to REGN, TS_T3=45°C w/ 103AT 44.25 44.75 45.25 % 10 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.5 Electrical Characteristics (continued) VAC = ACP = ACN = SYS = SRP = SRN = 28V, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 46.05 VT3_RISE TS pin voltage rising T3 threshold. Charge back to normal above this voltage. As Percentage to REGN, TS_T3=45°C w/ 103AT 45.55 46.55 % VT5_FALL TS pin voltage falling T5 threshold, charge suspended below this voltage As Percentage to REGN, TS_T5=60°C w/ 103AT 33.875 34.375 34.875 % VT5_RISE TS pin voltage rising T5 threshold. Charge back to ICHG and reduced VFB_REG above this voltage. As Percentage to REGN, TS_T5=60°C w/ 103AT 35 35.5 36 % REVERSE MODE BATTERY-PACK NTC MONITOR VBCOLD_RISE TS pin voltage rising TCOLD threshold. Reverse mode suspended above this voltage As Percentage to REGN (BCOLD = – 20°C w/ 103AT) 79.45 80.0 80.55 % VBCOLD_RISE TS pin voltage rising TCOLD threshold. Reverse mode suspended above this voltage As Percentage to REGN (BCOLD = – 10°C w/ 103AT) 76.65 77.15 77.65 % VBCOLD_FALL TCOLD comparator falling threshold. As Percentage to REGN (–20°C w/ 103AT) 78.2 78.7 79.2 % VBCOLD_FALL TCOLD comparator falling threshold. As Percentage to REGN (–10°C w/ 103AT) 75.5 75.6 76.5 % VBHOT_FALL TS pin voltage falling THOT As Percentage to REGN, (BHOT = 55°C threshold. Reverse mode suspends w/ 103AT) below this voltage 37.2 37.7 38.2 % VBHOT_FALL TS pin voltage falling THOT As Percentage to REGN, (BHOT = 60°C threshold. Reverse mode suspends w/ 103AT) below this voltage 33.875 34.375 34.875 % VBHOT_FALL TS pin voltage falling THOT As Percentage to REGN, (BHOT 65°C w/ threshold. Reverse mode suspends 103AT) below this voltage 30.75 31.25 31.75 % VBHOT_RISE TS pin voltage rising THOT threshold. Reverse mode allowed above this voltage As Percentage to REGN, (BHOT = 55°C w/ 103AT) 38.5 39.0 39.95 % VBHOT_RISE TS pin voltage rising THOT threshold. Reverse mode allowed above this voltage As Percentage to REGN, (BHOT = 60°C w/ 103AT) 35 35.5 36 % VBHOT_RISE TS pin voltage rising THOT threshold. Reverse mode allowed above this voltage As Percentage to REGN, (BHOT 65°C w/ 103AT) 32.0 32.5 33.0 % BATTERY CHARGER PROTECTION VBAT_OV Battery overvoltage threshold VFB rising, as percentage of VFB_REG 102.5 104 105.5 % VBAT_OVZ Battery overvoltage falling threshold VFB falling, as percentage of VFB_REG 100.5 102 103.5 % VICHG_OC Battery charge over-current threshold 170 mV VSRP - VSRN rising 120 THERMAL SHUTDOWN TSHUT Thermal shutdown rising threshold Temperature increasing 150 °C Thermal shutdown falling threshold Temperature decreasing 135 °C REGN REGULATOR AND GATE DRIVE SUPPLY (DRV_SUP) VREGN REGN LDO output voltage IREGN REGN LDO current limit IREGN = 20mA 4.8 5 VAC = 5V, IREGN = 20mA 4.35 4.6 VREGN = 4.5V 70 5.2 V V mA Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 11 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.5 Electrical Characteristics (continued) VAC = ACP = ACN = SYS = SRP = SRN = 28V, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VREGN_OK REGN OK threshold to allow switching REGN rising VDRV_UVPZ DRV_SUP under-voltage threshold to allow switching DRV_SUP rising VDRV_OVP DRV_SUP over-voltage threshold to DRV_SUP rising disable switching IAC_LOAD VAC discharge load current 16 mA IBAT_LOAD Battery (SRP) discharge load current 16 mA 3.55 12.8 13.2 V 3.7 V 13.6 V SWITCHING FREQUENCY AND SYNC fSW Switching Frequency VIH_SYNC FSW_SYNC input high threshold VIL_SYNC FSW_SYNC input low threshold PWSYNC FSW_SYNC input pulse width RFSW_SYNC = 133kΩ 212 250 288 kHz RFSW_SYNC = 50kΩ 425 500 575 kHz 1.3 V 0.4 80 V ns PWM DRIVERS RHIDRV1_ON Buck side high-side turnon resistance VBTST1 - VSW1 = 5V 3.4 Ω RHIDRV1_OFF Buck side high-side turnoff resistance VBTST1 - VSW1 = 5V 1.0 Ω VBTST1_REFRESH Bootstrap refresh comparator threshold voltage BTST1 falling, VBTST1 - VSW1 when lowside refresh pulse is requested RLODRV1_ON Buck side low-side turnon resistance VREGN = 5V 3.4 Ω RLODRV1_OFF Buck side low-side turnoff resistance VREGN = 5V 1.0 Ω tDT1 Buck side dead time, both edges 45 ns RHIDRV2_ON Boost side high-side turnon resistance VBTST2 - VSW2 = 5V 3.4 Ω RHIDRV2_OFF Boost side high-side turnoff resistance VBTST2 - VSW2 = 5V 1.0 Ω VBTST2_REFRESH Bootstrap refresh comparator threshold voltage BTST2 falling, VBTST2 - VSW2 when lowside refresh pulse is requested RLODRV2_ON Boost side low-side turnon resistance VREGN = 5V 3.4 Ω RLODRV2_OFF Boost side low-side turnoff resistance VREGN = 5V 1.0 Ω tDT2 Boost side dead time, both edges 45 ns ADC_SAMPLE[1:0] = 00 24 ms ADC_SAMPLE[1:0] = 01 12 ms 2.7 2.7 3.1 3.1 3.9 3.9 V V ANALOG-TO-DIGITAL CONVERTER (ADC) tADC_CONV Conversion-time, each measurement ADC_SAMPLE[1:0] = 10 ADCRES Effective resolution 6 ms ADC_SAMPLE[1:0] = 00 14 15 bits ADC_SAMPLE[1:0] = 01 13 14 bits ADC_SAMPLE[1:0] = 10 12 13 bits ADC MEASUREMENT RANGE AND LSB 12 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.5 Electrical Characteristics (continued) VAC = ACP = ACN = SYS = SRP = SRN = 28V, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN IAC_ADC Input current ADC reading (positive Range with 2mΩ RAC_SNS or negative) LSB with 2mΩ RAC_SNS –50000 IBAT_ADC Battery current ADC reading (positive or negative) Range with 5mΩ RBAT_SNS –20000 VAC_ADC Input voltage ADC reading VBAT_ADC Battery voltage ADC reading TSADC TS voltage ADC reading, as percentage of REGN VFB_ADC FB voltage ADC reading Range 65534 65534 0 99.9 0 mV mV 0.098 LSB mV mV 2 LSB mA mA 2 0 mA mA 20000 0 LSB Range 50000 2 LSB Range MAX UNIT 2 LSB with 5mΩ RBAT_SNS Range TYP % % 2047 1 mV mV I2C INTERFACE (SCL, SDA) VIH Input high threshold level 1.3 VIL Input low threshold level VOL Output low threshold level Sink current = 5mA IIN_BIAS High-level leakage current Pull up rail 3.3V V 0.4 V 0.4 V 1 µA LOGIC I/O PIN (CE, PG , STAT1, STAT2) VIH Input high threshold level (CE) VOL Output low threshold level (CE, PG, Sink current = 5mA STAT1, STAT2) 1.3 V 0.4 V VIL Input low threshold level (CE) 0.4 V IOUT_BIAS High-level leakage current (CE, PG, Pull up rail 3.3V STAT1, STAT2) 1 µA Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 13 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.6 Timing Requirements MIN NOM MAX UNIT VAC / BAT POWER UP tACOV_DGL Enter ACOV deglitch time, ACOV rising 100 µs tACOVZ_DGL Exit ACOV deglitch time, ACOV falling 12 ms tACUV_DGL Enter ACUV deglitch time, ACUV falling 100 µs tACUVZ_DGL Exit ACUV deglitch time, ACUV rising 12 ms tTERM_DGL Deglitch time for charge termination, VSRP - VSRN falling 220 ms tRECHG_DGL Deglitch time for recharge threshold, VFB falling 200 ms tPRECHG Pre-charge safety timer accuracy 1.7 2 2.3 hr tSAFETY Fast-charge safety timer accuracy, CHG_TMR = 8hr 6.8 8 9.2 hr tTOPOFF Top-off timer accuracy, TOPOFF_TMR = 30 min 25.5 30 34.5 min BATTERY CHARGER BATTERY-PACK NTC MONITOR tTS_DGL Deglitch time for TS threshold crossing 25 ms MPPT TIMERS tFULL_SWEEP Full Panel Sweep timer accuracy, FULL_SWEEP_TMR = 10 min 8.5 10 11.5 min 1000 kHZ I2C INTERFACE fSCL SCL clock frequency DIGITAL CLOCK AND WATCHDOG tLP_WDT I2C Watchdog reset time (EN_HIZ = 1, WATCHDOG[1:0] = 160s) 100 160 s tWDT I2C Watchdog reset time (EN_HIZ = 0, WATCHDOG[1:0] = 160s) 130 160 s 14 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.7 Typical Characteristics 100 100 98 98 96 96 94 94 Efficiency (%) Efficiency (%) CVAC = 160µF, COUT= 160µF, fSW = 250kHz, L = 10μH, TA = 25°C (unless otherwise specified) 92 90 5VIN 15VIN 20VIN 24VIN 36VIN 48VIN 60VIN 88 86 84 82 92 90 5VIN 15VIN 20VIN 24VIN 36VIN 48VIN 60VIN 88 86 84 82 80 80 0 2 4 6 8 10 Charging Current (A) 12 14 0 VBAT = 20V 98 0.4 96 0.3 94 0.2 Accuracy (%) Efficiency (%) 0.5 92 90 5VIN 15VIN 20VIN 24VIN 36VIN 48VIN 60VIN 88 86 84 82 1.5 3 4 5 6 7 Charging Current (A) 8 9 10 Figure 5-2. Charge Efficiency vs Charge Current (7s battery configuration) 100 1 2 VBAT = 28V Figure 5-1. Charge Efficiency vs Charge Current (5s battery configuration) 80 0.5 1 2 2.5 3 3.5 Charging Current (A) 4 4.5 20Vin, 29.2Vbat 28Vin, 29.2Vbat 36Vin, 29.2Vbat 0.1 0 -0.1 -0.2 -0.3 -0.4 5 VBAT = 38V -0.5 -40 -25 -10 5 20 35 Temperature ( C) 50 65 80 Figure 5-4. Charge Voltage Accuracy vs Temperature Figure 5-3. Charge Efficiency vs Charge Current (10s battery configuration) Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 15 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.7 Typical Characteristics (continued) CVAC = 160µF, COUT= 160µF, fSW = 250kHz, L = 10μH, TA = 25°C (unless otherwise specified) 5 0.50 20Vin, 27Vbat 28Vin, 27Vbat 36Vin, 27Vbat 4 3 0.40 2 0.35 Current (mA) Accuracy (%) IQ_BAT IQ_VAC 0.45 1 0 -1 0.30 0.25 0.20 -2 0.15 -3 0.10 -4 0.05 -5 -40 0.00 -40 -25 -10 5 20 35 Temperature ( C) 50 65 80 ICHG = 5A -20 0 IQ_BAT: VAC = 0V Figure 5-5. Charge Current Accuracy vs Temperature 20 40 60 Temperature ( C) 80 IQ_VAC: VAC = 20V 100 120 EN_HIZ = 1 Figure 5-6. Battery and Input Quiescent Current vs Temperature with VBAT = 28V 5 2 VINPM = 19V VINPM = 34V 20Vin, 28Vbat 28Vin, 28Vbat 36Vin, 28Vbat 4 3 1 Accuracy (%) Accuracy (%) 2 0 1 0 -1 -2 -1 -3 -4 -2 -40 -25 -10 5 20 35 Temperature ( C) 50 65 80 VBAT = 28V -25 -10 5 20 35 Temperature ( C) 50 65 80 IAC_DPM = 3A Figure 5-7. Input Voltage (VAC_DPM) Regulation Accuracy vs Temperature 16 -5 -40 Figure 5-8. Input Current (IAC_DPM) Regulation Accuracy vs Temperature Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 5.7 Typical Characteristics (continued) 100 100 98 98 96 96 94 94 92 90 88 5VSYS_REV 9VSYS_REV 15VSYS_REV 20VSYS_REV 36VSYS_REV 48VSYS_REV 86 84 82 Efficiency (%) Efficiency (%) CVAC = 160µF, COUT= 160µF, fSW = 250kHz, L = 10μH, TA = 25°C (unless otherwise specified) 92 90 88 5VSYS_REV 9VSYS_REV 15VSYS_REV 20VSYS_REV 36VSYS_REV 48VSYS_REV 86 84 82 80 80 0 20 40 60 80 100 120 140 160 180 200 220 240 Reverse Mode Output Power (W) 0 VBAT = 20V 20 60 80 100 120 140 160 180 200 220 240 Reverse Mode Output Power (W) VBAT = 28V Figure 5-9. Reverse Mode Efficiency (5s battery configuration) Figure 5-10. Reverse Mode Efficiency (7s battery configuration) 100 3 19VBAT 27VBAT 38VBAT 98 2 96 92 90 88 5VSYS_REV 9VSYS_REV 15VSYS_REV 20VSYS_REV 36VSYS_REV 48VSYS_REV 86 84 82 80 Accuracy (%) 94 Efficiency (%) 40 1 0 -1 -2 -3 0 20 40 60 80 100 120 140 160 180 200 220 240 Reverse Mode Output Power (W) 5 10 15 20 25 30 35 40 45 Reverse Mode Regulation Voltage Setting (V) 50 Figure 5-12. Reverse Mode Output Voltage Accuracy vs VAC_REV Setting VBAT = 38V Figure 5-11. Reverse Mode Efficiency (10s battery configuration) Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: BQ25756 17 BQ25756 www.ti.com SLUSEN5A – AUGUST 2023 – REVISED AUGUST 2026 6 Detailed Description 6.1 Overview The BQ25756 is a wide input voltage, Li-Ion, Li-polymer, LiFePO4 bi-directional switched-mode buck-boost battery charge controller. The device offers high-efficiency battery charging over a wide voltage range with accurate and programmable charge current and charge voltage regulation, in addition to automatic charge preconditioning, termination, and charge status indication. The device integrates all the loop compensation and 5V gate drivers for the buck converter, thereby providing a high density solution with ease of use. The switching frequency of the device can be programmed or fo