Datasheet · 2026
Diodes AP33772S I2C USB PD3.1 EPR Sink Controller — Datasheet (DS46176)
The proposed AVS 24 V sink (UP-5).
- usb pd
- epr
- avs
- sink controller
Datasheet · 2026
The proposed AVS 24 V sink (UP-5).
AP33772S I2C USB PD3.1 EPR SINK CONTROLLER Pin Assignments The AP33772S is a highly integrated USB Type-C® PD3.1 sink controller to support Extended Power Range (EPR)/Adjustable Voltage Supply (AVS) up to 28V and Standard Power Range (SPR)/ Programmable Power Supply (PPS) up to 21V. The device is targeted for DC power request and control for flexible Type-C Connectorequipped Devices (TCDs) with an embedded host MCU (Micro Controller Unit) and I2C interface pins (SCL, SDA). NC DP 20 19 NC FLIP 6 13 OTP 11 14 12 5 V18 IFB SCL VSEL 15 W-QFN4040-24 (Type A1) Applications • • • • • • • • • • • • Notes: V5V CC2 SDA Features • • • • • • • • • 21 16 4 10 3 NC GND 9 CC1 INT DN 17 Meanwhile, the AP33772S provides a LED pin to indicate the different PD power negotiation results, and a FLIP pin to show the cable plugin orientation. USB PD3.1 v1.6 Certified with TID: 10062 Operating Voltage Range of VCC: 3V to 31V Support PD3.1 EPR/AVS Up to 28V and SPR/PPS Up to 21V Support OVP with Hard Reset and Auto Restart Support UVP, OCP and OTP with Output Latch Off Support OTP and Thermal De-Rating through NTC Resistor Support OTP through Internal Junction Temperature Detection VBUS Short Protection on CC1/CC2 Pins Up to 34V I2C Commands for External MCU Monitoring, Control and Parameter Programming Dedicated Pins for CC Flip Indication and Interrupt Request Support Moisture Detection of the Type-C Connector LED Indication for Different Negotiation Results Driver for Output Enable N-MOS Switch Support Dead Battery Function Support Legacy Type-A Charger with Type-A to Type-C Cable Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/ 22 VOUT VCC 24 18 2 7 1 NC 8 Based on high-voltage process, the AP33772S offers short protection between CC1/CC2 pins to adjacent high-voltage pin up to 34V. Smart built-in firmware of the AP33772S offers comprehensive safety protection scheme, including overvoltage protection (OVP), undervoltage protection (UVP), overcurrent protection (OCP), over temperature protection (OTP) and moisture detection of the Type-C connector. In addition, external OTP and thermal de-rating are supported by an NTC resistor. ISENP LED Through the I2C interface interaction and interrupt mechanism, the host MCU sets up proper desired power profile (programmable voltage and current) with relevant threshold (OTP, OCP, etc.) and delegates PD negotiation tasks to the AP33772S. The host MCU further inquiries about status of various I2C registers for intended applications. 23 PWR_EN (Top View) GPIO Description USB Type-C connector-equipped battery-powered devices USB Type-C connector-equipped DC-power input devices USB PD3.1 testers 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. All other trademarks are the property of their respective owners. AP33772S Document number: DS46176 Rev. 10 - 2 1 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Typical Application Circuit The AP33772S is a USB Type-C power delivery sink controller used to request power from an attached USB PD charger for a typical TCD embedded with a host MCU, as shown in Figure 1 below. Once the cable attachment is completed, the AP33772S is powered from VCC pin, and starts to do power-on initiation by setting up its internal registers and receiving the TCD configuration parameters from the external host MCU via I2C interface. After the power-on initialization, the AP33772S starts to decode USB PD commands from CC pin and gets the PD source capability. The host MCU makes a choice of the source power output capabilities, Power Data Object (PDOs), and sends request for PDO to the AP33772S through I2C command. The AP33772S then automatically initiates the PD negotiation progress with the attached Type-C PD compliance charger (through Type-C to TypeC cable) or legacy Type-A charger (through Type-A to Type-C cable). If the PDO is matched, the MOS switch is turned on to connect VBUS to VOUT, and then the source adapter successfully provides power to the AP33772S-embedded TCD device. The AP33772S supports the dead battery function and can be woken up as soon as an active PD adapter is plugged in the TCD Type-C receptacle. After the power link is set up between source and sink, OVP, UVP, OCP, and OTP protections are enabled to monitor the power charging status. In case power protection is triggered, the AP33772S shuts down the VOUT-enable NMOS switch, and the host MCU will need to load new PD_REQMSG to start a PDO negotiation process to resume charging operation. The back-to-back N-MOS switches shown in Figure 1 could be simplified to a simple N-MOS switch for the TCD when there is no concern on reverse current from power module back to VBUS. Figure 1. Typical System Configuration of AP33772S PD3.1 Sink Controller in a TCD AP33772S Document number: DS46176 Rev. 10 - 2 2 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Pin Descriptions Pin No. Pin Name Type (Note 4) Pin Function 1 ISENP AHV Current sense positive node, connect to the positive node of the external current sensing resistor 2 NC — No Connection 3 GND GND Ground 4 SDA DIO I2C data, need to be pulled up externally. 5 SCL DIO I2C clock, need to be pulled up externally. 6 FLIP DO Flip indicator of Type-C plug. LOW: CC1 detected. HIGH: CC2 detected. 7 GPIO DIO General Purpose Input or Output (Function only for AP33772SDKZ-13-FA02) 8 LED DO LED indicator pin, refer to Table 13 for detailed description 9 INT DO Interrupt pin is used to inform external MCU. LOW: normal. HIGH: interrupt happened. 10 NC — No Connection 11 VSEL AI Voltage selection pin, connect resistance to ground to set Voltage (Function only for AP33772SDKZ-13-FA02) 12 V18 DP 1.8V LDO output for internal use only. Connect a 100nF cap to GND. This pin cannot drive external load. 13 OTP AIO 100μA current source output for NTC connected to ground. This NTC is used to monitor temperature variation. 14 NC — No Connection 15 IFB AI For current measurement, a 100nF cap to Ground is suggested. 16 CC2 AIO 17 CC1 AIO 18 DN AIO 19 DP AIO 20 V5V AP 21 NC — No Connection 22 VOUT AHV Terminal for VOUT Monitoring 23 PWR_EN AHV NMOS Switch gate control to switch the NMOS on or off. 24 VCC AHV The power supply of the IC. A 1μF cap is required to connect this pin to GND pin. — EPAD GND Exposed pad is suggested to connect to Ground for better thermal dissipation. Type-C Configuration Channel 2 (CC2). The CC2 pin detects, configures and manages the connections across a USB Type-C cable. Type-C Configuration Channel 1 (CC1). The CC1 pin detects, configures and manages the connections across a USB Type-C cable. DN of Type-C Connector. This pin could be unconnected if moisture detection function is waived. DP of Type-C Connector. This pin could be unconnected if moisture detection function is waived. Output of the internal LDO with VCC as input. A 1μF cap is required to connect this pin to GND. When VCC is off, V5V pin could be an alternative power path for the AP33772S when provided a 5V external power. Table 1. Pin Descriptions of AP33772S Sink Controller Note 4: AHV – Analog High Voltage pin. AP – Power for Analog Circuit and Analog I/O pins, 5.0V operation. AI – Analog Input pin. DP – Power for Digital Circuit operation. AIO – Analog Input/Output pin with 5.0V operation. However, DP/DN & CC1/CC2 pins are 3.3V operation. DI – Digital Input pin. All are 5.0V operation. DO – Digital Output pin. All are 5.0V operation. DIO – Digital Input/Output pin. All are 5.0V operation. AP33772S Document number: DS46176 Rev. 10 - 2 3 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Block Diagram V5V ISENP VCC SENSE LDO5V/1.8V PWR_EN VOUT OTP IFB OSC OTP/MTP ROM A/D Digital Control logic SCL USB Type C SDA Register Bank LED BMCTx Moisture Detection Protection OCP UVP OTP OVP M INT U FLIP X I2C V18 CC1 CC2 DP DN GND IFB Figure 2. The Functional Block Diagram of AP33772S PD3.1 Sink Controller AP33772S Document number: DS46176 Rev. 10 - 2 4 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Absolute Maximum Ratings (Note 5) Symbol Parameter Unit VVCC Input Voltage at VCC Pin -0.3 to 34 V VV5V Input Voltage at V5V Pin -0.3 to 7 V VV18 Input Voltage at V18 Pin -0.3 to 5 V Input Voltage at FLIP, INT, OTP, LED Pins -0.3 to 7 V Input Voltage at VOUT, ISENP Pins -0.3 to 31 V Input Voltage at PWR_EN Pin -0.3 to 38 V — Voltage from PWR_EN to VCC Pin -30 to 4 V VCC1, VCC2 Input Voltage at CC1, CC2 Pins -0.3 to 34 V VFLIP, VINT, VOTP, VLED VVOUT, VISENP VPWR_EN Note: Rating VDP, VDN Input Voltage at DP, DN Pins -0.3 to 7 V VSCL, VSDA Input Voltage at SCL, SDA Pins -0.3 to 7 V TJ Operating Junction Temperature -40 to 150 °C TSTG Storage Temperature -65 to 150 °C TLEAD Lead Temperature (Soldering, 10s) 300 °C ESD Human Body Model 2 kV ESD Charged Device Model 750 V 5. Stresses greater than those listed under “Absolute Maximum Ratings” can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to “Absolute Maximum Ratings” for extended periods can affect device reliability. Package Thermal Information (Note 6) Symbol Note: Parameter RθJA Junction-to-Ambient Thermal Resistance RθJC(top) Value Unit 28 °C/W Junction-to-Case (Top) Thermal Resistance 16 °C/W RθJB Junction-to-Board Thermal Resistance 11.2 °C/W ΨJT Junction-to-Top Characterization Parameter 0.4 °C/W ΨJB Junction-to-Board Characterization Parameter 11.4 °C/W RθJC(bot) Junction-to-Case (Bottom) Thermal Resistance 6.0 °C/W 6. Test condition: device mounted on FR-4 substrate PC board, 2oz copper, with the minimum footprint. Recommended Operating Conditions Symbol Parameter Min Max Unit VVCC Power Supply Voltage at VCC Pin 3.3 31 V VV5V Input Voltage at V5V Pin 4.37 5.33 V VDP, VDN Input Voltage at DP, DN Pins 2.75 3.25 V VSCL, VSDA Input Voltage at SCL, SDA Pins 4.37 5.33 V TJ Operating Junction Temperature Range -40 125 °C TA Operating Ambient Temperature -40 85 °C AP33772S Document number: DS46176 Rev. 10 - 2 5 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Electrical Characteristics (@ TA = +25°C, unless otherwise specified.) Symbol Parameter Condition Min Typ Max Unit VCC SECTION VST Startup Voltage — 2.5 2.8 3.5 V VUVLO Minimum Operating Voltage — 2.3 2.7 3 V VVCC_HYS VCC Hysteresis (VST-VUVLO) — 0.05 — — V IVCC_OPR Operating Supply Current VVCC = 5V — 3.3 6 mA VL_RD3A Low Voltage Threshold Used to Distinguish RD Attached or Detached for 3A Delivery — — 1.35 — V VH_RD3A High Voltage Threshold Used to Distinguish RD Attached or Detached for 3A Delivery — — 2.0 — V OTP Current Source (Note 8) — — 100 — μA OTP Current Source Range (Note 8) — -8 — +8 % VVCC = 5V 4.37 4.85 5.33 V VVCC = 5V 1.4 — — V VVCC = 5V — — 0.4 V — 2 — — mA CC1/CC2 SECTION CURRENT SOURCE SECTION IOTP IOTP_RANGE FLIP, INT, OTP, LED, and I2C SECTION VGPIOO VGPIOI_HI VGPIOI_LO IGPIO FLIP, INT, OTP, LED Pins Output Voltage Range (Note 8) FLIP, INT, OTP, LED Pins Input High Voltage (Note 8) FLIP, INT, OTP, LED Pins Input Low Voltage (Note 8) FLIP, INT, OTP, LED Pins Sink/Source Capability (Note 8) VI2CO SDA, SCL Power Supply Range (Note 8) VVCC = 5V — 4.85 — V VI2C_HI SDA, SCL Input High Voltage (Note 8) VCC = 5V 1.4 — — V VI2C_LO SDA, SCL Input Low Voltage (Note 8) VCC = 5V — — 0.4 V FSCL SCL Clock Frequency (Note 8) — — — 400 kHz PROTECTION FUNCTION SECTION VOVP5V OVP_5V Enable Voltage (Notes 7, 8) — — 7 — V VOVP20V OVP_20V Enable Voltage (Notes 7, 8) — — 22 — V VOVP28V OVP_28V Enable Voltage (Notes 7, 8) — — 31 — V OVP Debounce Time (Note 9) — — 90 — ms Delay from OVP Threshold Trip to NMOS Gate Turn-Off (Note 8) — — — 50 ms Internal OTP Temperature — — 130 — °C VV5V V5V Output Range — 4.37 4.85 5.33 V IV5V V5V Source Capability — — 30 — mA VFS Full Swing Range — — 2.048 — V — Resolution — — 8 — Bit — DNL — — 1 — LSB tDEBOUNCE_OVP tOV_DELAY TOTP V5V SECTION ADC SECTION Notes: 7. 110% OVP setting @ PDO > 18V. PDO+2V OVP setting @ PDO ≤ 18V. 8. Guaranteed by design. 9. OVP blanking time during VO transition from high output voltage to low output voltage, such as 9V to 5V, or 12V to 5V. AP33772S Document number: DS46176 Rev. 10 - 2 6 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description Overview The AP33772S, a highly integrated USB Type-C PD3.1 sink controller, supports EPR/AVS up to 28V and provides SPR/PPS up to 21V. The device is targeted for DC power request and control for flexible Type-C Connector-equipped Devices (TCDs) with an embedded host MCU (Micro Controller Unit) and I2C interface pins (SCL, SDA). Cable Attachment and Power-On Initialization After plugging the cable from a powered PD source adapter into the AP33772S-equipped TCD device, both Rd (shown in Figure 1, a 5.1kΩ resistor defined by the USB Type-C Cable and Connector Specification, Revision 2.0, which can be downloaded from the official USB website) are connected to the Configuration Channel pins (CC1/CC2). According to the USB PD Type C definition, only one of the CC1/CC2 can be pull down by Rd as the cable configuration channel (CC) wire, the other CC1 or CC2 wire will act as VCONN to power the plug from the source side USB PD controller (like to power the e-Marker chip in the cable), thus the CC/VCONN configuration and flip polarity are established. As soon as the above cable attachment flow is completed, the PD source adapter starts broadcasting PD source capabilities to the PD sink through CC pin, which is connected to the AP33772S internal Bi-phase Mark Code (BMC) block. Meanwhile, the AP33772S starts to do power on initiation as soon as its VCC pin is powered from the 5V VBUS. After its internal MCU default configuration and registers are set up, the AP33772S will act as a I2C slave device and wait for the external host MCU to load the TCD configuration parameters to the internal I2C registers of the AP33772S, and then to update the AP33772S internal configuration accordingly. During the negotiation, the source capabilities are stored in the AP33772S internal registers and the external MCU will read the source capabilities information through I2C interface. A total of 13 PDO registers are used to store the source capabilities of PD adapter, including 7 for SPR and 6 for EPR as Figure 3 below. Figure 3. A Total of 13 PDO Registers Are Used to Store the Source Capabilities of PD Adapter Once the source capability is received, the AP33772S will reply with a CRC good command and first request a default 5V from the source adapter. The AP33772S is now powered by the 5V profile from the source adapter and waiting for host MCU to deliver requests for a new PDO power profile or other control commands through the I2C interface. I2C Interface and Control I2C interface (SCL, SDA pins) and INT pin are used as the communication channels between the AP33772S and the host MCU of the TCD device. During the power-on initialization, the host MCU needs to deliver the system configuration parameters to the AP33772S for its internal setup. After the system set up, the host MCU can timely update the power profiles from the source adapter capability. Meanwhile, the system MCU can monitor the AP33772S internal registers and then give a control of the system operation through I2C commands accordingly. All of the I2C commands used in the AP33772S are summarized in Table 16. The functions include: 1. PDO information getting and New PDO request (i.e. Table 2, 3) 2. Protection threshold setting (i.e. Table 4, 5, 6, 7, 8) 3. System configuration setting (i.e. Table 3, 9, 10) 4. System data acquisition 5. System status inquiry (i.e. Table 11, 12, 13) 6. Legacy support (i.e. Table 14) AP33772S Document number: DS46176 Rev. 10 - 2 7 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) Power Policy Management Flowchart Below is the power policy management flowchart of the AP33772S. Any source side power device connected to the AP33772S, it will follow this flow to handle power requests and related actions. Start/Initiation Source device Attachment STATUS.STARTED = 1 INT Pin pulled high INT Pin pulled high I2C N Setup configuration Host MCU configure AP33772S (Disable/Enable specific modules) Configuration done? (waiting for 100ms) Y N PD negotiation with Source successfully Y Non-PD mode (5V mode) Turn on VBUS Switch Turn on VBUS Switch Source Capability Stored in register SET STATUS.NEWPOD = 1 SET STATUS.READY = 1 I2C Read STATUS.NEWPOD Read STATUS.READY If STATUS.NEWPOD& STATUS.READY=1 ? Y Read Source Capability I2C Host MCU read Source Capability I2C Request PDO/APDO Host MCU request PDO/APDO PD negotiation with Source device Vout change by requested PDO/APDO AP33772S receives a PS_RDY message from the PD source SET PD_MSGRLT.RESPONSE=1 I2C Read PD_MSGRLT.RESPONSE Y If PD_MSGRLT.RESPONSE=1 ? N AP33772S Document number: DS46176 Rev. 10 - 2 8 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) Source PDO Information Getting Before selecting a new PDO profile, the host MCU should get the total PDO register information that has been placed in the AP33772S I2C registers through the I2C read commands. The AP33772S provides a 26-byte I2C command SRCPDO (0x20), which can read all the 13 PDOs at one time. In addition, there are 13 commands provided for host MCU to read each PDO information individually, where SRC_SPR_PDO1 (0x21) to SRC_SPR_PDO7 (0x27) and SRC_EPR_PDO8 (0x28) to SRC_EPR_PDO13 (0x2D) are used for SPR PDOs and EPR PDOs respectively. The AP33772S will echo each PDO read command with a 2-byte data which includes the PDO type (SPR, EPR, Fixed, PPS, AVS), voltage range (minimum, maximum) and current maximum. Request a New Source PDO The host MCU can select a suitable PDO to fit in the system application request and then deliver it to the AP33772S through I2C command PD_REQMSG (0x31). It is a 16-bit word used to send the message of requested PDO, Operating Current and Output Voltage settings for APDO at runtime as shown in Table 2 below, where: 1. 2. 3. PDO_INDEX can assign the target PDO from the PDO index (information stored in the PDO register). CURRENT_SEL can set the operating current value of RDO. VOLTAGE_SEL can set the output voltage value of PPS/AVS RDO, only for assigned APDO (Augmented PDO). PD_REQMSG Bit Attribute Pwr-On Description PDO_INDEX 12:15 WO 0h [0001] to [0111]: For SPR PDO1 to PDO7, [1000] to [1101]: For EPR PDO8 to PDO13, if its corresponding PDO is detected. Others = Reserved CURRENT_SEL 8:11 WO 0h Operating Current Select [0000] to [1111] = 1.00A to 5.00A 0h VOLTAGE_SEL has no meaning for Fixed PDO selected If set B [15] = 0 (select SPR): output voltage in 100mV/unit for PPS APDO selected If set B [15] = 1 (select EPR): output voltage in 200mV/unit for AVS APDO selected VOLTAGE_SEL 0:7 WO Table 2. The I2C Command PD_REQMSG (0x31) Is Used to Refresh Existing Sink RDO After the AP33772S receiving PD_REQMSG command, it will generate a new RDO of voltage and current and then starts to negotiate with PD source. Once the negotiation is completed, both the registers of STATUS and PD_MSGRLT are updated accordingly. Meanwhile, the AP33772S also provides a simple command to request Maximum current and Maximum voltage of the selected source PDO by setting only the PDO_INDEX to the desired source PDO and keep CURRENT_SEL = 0xF and VOLTAGE_SEL = 0xFF. For example, if source PDO3 is valid then the host MCU can write PD_REQMSG with 0x3FFF, and the AP33772S will request the Maximum current and Maximum voltage of source PDO3. Support EPR/AVS If the PD Source supports EPR Mode, after the first negotiation, the AP33772S will try to enter EPR Mode when PDCONFIG (0x05) is set to 1 at EPR_MODE bit, as Table 3 below. If successfully entering EPR Mode, the AP33772S stores the EPR Source Capability in SRC_EPR_PDOx registers (0x28 to 0x2D) and enables EPR request. PDCONFIG Bit Attribute Pwr-On Description — 7:4 RW 0h Reserved — 3 RW 0h Reserved DRSWP_EN 2 RW 0h 0/1: Reject/Accept Data Role Swap from Port Partner, and set Dual-Role Data bit of Sink Fixed PDO to 0/1 PPS_AVS_EN 1 RW 1h 0/1: Disable/Enable sink PPS and AVS capability EPR_MODE_EN 0 RW 1h 0/1: Disable/Enable EPR mode Table 3. The I2C Command PDCONFIG (0x05) Is Used to Enable Sink EPR Mode AP33772S Document number: DS46176 Rev. 10 - 2 9 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) Default Voltage Selection (Function only for AP33772SDKZ-13-FA02) Before the host MCU completes PDO negotiation with the AP33772S, the device supports setting up a desired original default voltage value through external resistor setting. Up to eight resistors connected to the VSEL pin are supported for voltage selection. It is recommended to use the resistors with ±1% accuracy or better, to connect to the VSEL pin to ensure the request selection. The mapping between VSEL selection and resistance values is illustrated in Table 4. The original default voltage set by external resistor will be covered by the selected PDO after the host MCU establishes communication with the AP33772S through I2C. If the VSEL setting does not match the PD Source capability, the AP33772S will request the default Fixed_5V PDO and the maximum current to negotiate with the source. Index VSEL 1 5V 100 or Floating RVSEL (kΩ, 1%) 2 9V 3 12V 4 15V 5 20V 6 28V 7 Reserved 8 Reserved 82 66 52 39 26 15 5.1 Table 4. The Mapping between VSEL Amplitudes and Resistance Values Integrated Power Protection Based on high-voltage process, the AP33772S offers short-protection between CC1/CC2 pins and adjacent high-voltage pins up to 34V. In addition, the built-in firmware of the AP33772S offers comprehensive safety protection schemes, including OTP, OCP, OVP and UVP. Besides, moisture detection of the connector is provided. When a protection mechanism is triggered, the associated VOUT MOS switch is turned off to disconnect VBUS from VOUT. Overtemperature Protection (OTP) and Thermal De-rating An NTC thermistor is used to measure temperature of potential hot spot on the board. NTC can be connected to a constant current source of 100μA at OTP pin. As the temperature changes NTC resistance changes, with the AP33772S internal ADC, OTP pin voltage is measured and the NTC resistance can be calculated. The AP33772S then estimates the temperature value based on the 4 user-input NTC resistance values (refer to Temperate Estimation) and this estimated temperature can be read by accessing TEMP (0x13) register through an I2C command. The I2C command OTPTHR (0x1A) register, as shown in Table 5, is used to set OTP threshold, and is 78h (+120°C) by default. If the TEMP value rises over the OTPTHR value after the de-bouncing time, the OTP is triggered, and STATUS Bit [6] is set to High. The associated output enable MOS switch will be turned off. OTPTHR OTPTHR Bit Attribute 7:0 RW Pwr-On 78h Description OTP threshold, Unit: °C The temperature threshold triggers the OTP function, the default value for OTPTHR is 78h (120°C). Table 5. The I2C Command OTPTHR (0x1A) Is Used to Set OTP Threshold Furthermore, the AP33772S includes I2C command DRTHR (0x1B) register, as shown in Table 6 below, which can be used to program threshold temperature to trigger power de-rating function. If TEMP value rises above DRTHR, for PDO supporting PPS APDO, after de-bouncing time (30ms), the device will send out new RDO to negotiate with PDO source device, to reduce the input current by 50%. The AP33772S monitors the temperature at the potential hot spot continuously (with 1kHz sampling frequency), through NTC. If TEMP value falls 10C below DRTHR, the device negotiates with PDO again and recovers the charging power. DRTHR DRTHR Bit Attribute 7:0 RW Pwr-On Description 78h De-Rating threshold, Unit: °C The temperature threshold triggers Power De-Rating procedure, the default value for DRTHR is 78h (120°C). Table 6. The I2C Command DRTHR (0x1B) Is Used to Set De-Rating Threshold In addition, the internal OTP is supported through Internal junction temperature detection. When the temperature goes beyond the internal OTP threshold, the associated VOUT MOS switch is turned off to disconnect VBUS from VOUT. AP33772S Document number: DS46176 Rev. 10 - 2 10 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) Overcurrent Protection (OCP) Threshold Setting The AP33772S supports OCP to control the output load condition by monitoring the output current through detection of IR drop on the 5mΩ Rsense resistor. Once the TCD device draws more current than the OCP threshold level after de-bounce time (30ms), the AP33772S enters FAULT states by turning off the VOUT MOS Switches. Table 7 below shows the correspondence between OCPTHR and OCP Threshold Current, where the OCPTHR stands for IOCPTHR, OCP threshold current defined by user via I2C command OCPTHR (0x19). The user defined OCPTHR value is an 8-bit register with 50mA/LSB and 00h by default. After successful negotiation with the PD source, if the OCPTHR value is still 00h, the OCP Threshold Current would be 110% of the IMAX, maximum current of the selected PDO/APDO. If the OCPTHR value has been updated through I2C command, the OCP Threshold Current would be 110% of IOCPTHR value. Note 10: OCPTHR OCP Threshold Current OCPTHR = 0 IMAX* 110% (Note 10) OCPTHR ! = 0 IOCPTHR* 110% IMAX: Maximum Current of PDO/APDO. Table 7. Correspondence between OCPTHR and OCP Threshold Current Overvoltage Protection (OVP) Threshold and Adjustment The AP33772S triggers the OVP protection when VBUS voltage is higher than OVP threshold voltage. The Table 8 below summarizes the correspondence between VVREQ, VOVPOS and OVP threshold voltage, where VVREQ is the voltage requested after successful power negotiation with the PD source adapter, and VOVPOS is the OVP offset, refer to Table 16 for VOVPOS programming via I2C command OVPTHR (0x18). If VBUS voltage is higher than OVP threshold value in OVPTHR after the de-bounce time limit, the AP33772S enters the FAULT state, where the VOUT MOS Switches are turned off. Mode SPR Mode EPR Mode Criteria OVP Threshold Voltage (VVREQ + VOVPOS) ≤ 20V (VVREQ + VOVPOS) > 20V (VVREQ + VOVPOS) ≤ 40V (VVREQ + VOVPOS) > 40V VVREQ + VOVPOS VVREQ * 110% VVREQ + VOVPOS VVREQ * 110% Table 8. Correspondence between VVREQ, VOVPOS and OVP Threshold Voltage Undervoltage Protection (UVP) Threshold Adjustment The AP33772S triggers the UVP protection when VBUS voltage is lower than UVP threshold Voltage. The Table 9 below shows the relation between undervoltage protection level, UVPTHR, and UVP threshold voltage. The default value of UVPTHR is 80%, which can be modified via I2C command UVPTHR (0x17). If VBUS voltage is lower than UVP threshold after de-bounce time, the AP33772S enters FAULT state, where the VOUT MOS switches are turned off. UVPTHR UVP Threshold Voltage 1 VVREQ * 80% 2 VVREQ * 75% 3 VVREQ * 70% Table 9. Correspondence between VVREQ, UVPTHR and UVP Threshold Voltage Moisture Detection The AP33772S supports the moisture detection of the connector. As soon as the Type-C connector is plugged in, the impedance between DN/DP pin and ground is evaluated by internal ADC digitization and firmware calculation. If the impedance level is below the pre-determined threshold, the VOUT MOS switch is turned off to disconnect VBUS from VOUT, and the LED is tuned off and on, with the “MOISTURE” pattern accordingly, see LED Indication section for details. If the impedance check is normal, the AP33772S starts to negotiate with the source. AP33772S Document number: DS46176 Rev. 10 - 2 11 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) VOUT-Enable Switch Taking VBUS voltage as input, the built-in charge-pump circuit generates a high-voltage gate driver (PWR_EN) to drive an external high-side NMOS switch. A 6.2kΩ resistance is suggested to connect the PWR_EN to the NMOS gate. Once the PDO negotiations between source and sink are successful, and the VVREQ, the requested voltage, is greater than VVSELMIN, the PWR_EN enables the NMOS switch and connects VBUS to VOUT. Otherwise, the NMOS switch will remain turned off, and VBUS is disconnected from VOUT. Meanwhile, the NMOS VOUT-enable switch is also used for power protection. Whenever output overvoltage, undervoltage, overcurrent, or over temperature occurs, the AP33772S enters the FAULT state, where the VOUT MOS Switches are turned off to protect the host system from possible damage. To get out of the Fault state, the host MCU will need to load new RDO to start a PDO negotiation process to resume charging operation. Protection Mode Configuration To fit the comprehensive application scenarios, the power protection modes in the AP33772S are configurable through the I2C command CONFIG (0x04) as shown in Table 10 below. CONFIG Bit Attribute Pwr-On DR_EN 7 RW 1h 0/1: Disable/enable DR (De-Rating) function Description OTP_EN 6 RW 1h 0/1: Disable/enable OTP function OCP_EN 5 RW 1h 0/1: Disable/enable OCP function OVP_EN 4 RW 1h 0/1: Disable/enable OVP function UVP_EN 3 RW 1h 0/1: Disable/enable UVP function — 2 RW 0h Reserved — 1 RW 0h Reserved — 0 RW 0h Reserved Table 10. The CONFIG Command Is Used to Configure the Power Protection Schemes Interrupt Signal The AP33772S supports a level-triggered interrupt signal through INT pin to the host MCU. The I2C command MASK (0x02) defines enable or disable of each interruptible event as shown in Table 11 below. The interrupt initialization is required before use. When the defined interruptible event happens, the AP33772S will set the INT pin output to level HIGH if the relevant event of the MASK register is enabled. MASK Bit Attribute Pwr-On — OTP_MSK OCP_MSK OVP_MSK UVP_MSK NEWPDO_MSK READY_MSK STARTED_MSK 7 6 5 4 3 2 1 0 RW RW RW RW RW RW RW RW 0h 0h 0h 0h 0h 0h 1h 1h Description Reserved 1: OTP status mask 1: OCP status mask 1: OVP status mask 1: UVP status mask 1: NEWPDO status mask 1: READY status mask 1: STARTED status mask Table 11. The MASK Register Defines Enable or Disable of Each Interruptible Event System Data Acquisition During the normal operation, the host MCU can monitor the PDO negotiation result (VREQ and IREQ), and its VOUT timely status (VOUT voltage and current) through I2C commands. VREQ (0x14) and IREQ (0x15) are used to read the voltage and current requested, and VOLTAGE (0x11) and CURRENT(0x12) are used to read Output status. Meanwhile, the I2C command TEMP (0x13) is used to read the system temperature. System Status and Operating Mode Inquiry The Host system MCU can monitor the PD system status through I2C interface. The Status command (0x01) is an 8-bit register and used to store the AP33772S status as Table 12 below. Meanwhile, the user can read out the PD operating modes through I2C command OPMODE (0x03), as shown in Table 13 below, where CC Flip information and power source type are provided. AP33772S Document number: DS46176 Rev. 10 - 2 12 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) System Status and Operating Mode Inquiry (continued) STATUS Bit Attribute Pwr-On Description — OTP OCP OVP UVP NEWPDO READY 7 6 5 4 3 2 1 RC RC RC RC RC RC RC 0h 0h 0h 0h 0h 0h 0h STARTED 0 RC 0h Reserved 1: OTP status 1: OCP status 1: OVP status 1: UVP status 1: New source PDOs received (Valid when PDMOD = 1) 1: Ready to receive I2C request/command 1: System started. Allow system configuration (register) to be updated within 100ms Table 12. The STATUS Command Is Used to Monitor AP33772S Operating Status OPMODE Bit Attribute Pwr-On CCFLIP 7 RO 0h DR 6 RO 0h DATARL — — — PDMOD LGCYMOD 5 4 3 2 1 0 RO RO RO RO RO RO 0h 0h 0h 0h 0h 0h Description 0: CC1 is connected to CC line or unattached mode 1: CC2 is connected to CC line 0: Normal mode 1: DR (De-rating) mode The current Port Data Role Reserved Reserved Reserved 1: PD source connected 1: Legacy source connected (non-PD) Table 13. The OPMODE Command Is Used to Monitor if PD or Legacy Source Is Connected GPIO Control (Function only for AP33772SDKZ-13-FA02) The Host system MCU can control the status of GPIO pin through I2C interface. The GPIO command (0x52) is an 8-bit register and used to control the GPIO (PIN 7) status as Table 14 below. GPIO Bit Attribute Pwr-On GPIO_PU_EN 7 RW 0h Enable GPIO internal pull-up resistor Description GPIO_PD_EN 6 RW 0h Enable GPIO internal pull-down resistor — 5 RO 0h — — 4 RO 0h — GPIO_DI 3 RO 0h GPIO input data GPIO_IE 2 RW 0h Enable GPIO input data GPIO_DO 1 RW 0h 0: output ‘LO’ 1: output ‘HI’ GPIO_OE 0 RW 0h Enable GPIO output mode Table 14. The GPIO Command Is Used to Control the GPIO Pin AP33772S Document number: DS46176 Rev. 10 - 2 13 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) LED Indication The AP33772S drives external LED lighting to show state indication through LED pin. The Table 15 below summarizes the LED indication and VOUT result in each state. State LED Indication VOUT INIT NA OFF VBUS/Rp attached and AP33772S initialization Comments CHARGING 4-sec Breathing ON Successful negotiation or enter Non-PD Mode and start charging MISMATCH Full Light OFF VSELMIN mismatch (VREQ < VSELMIN) MOISTURE 2-sec Flicker OFF Abnormal impedance detected in the Type-C connector FAULT 0.6-sec Flicker OFF OVP, OCP, UVP or OTP occurs Table 15. LED Indication for Different Negotiation Results Legacy Type-A Charger Support When the energy source is from a legacy Type-A charger with Type-A to Type-C cable connection to the TCD, the AP33772S enters the Non-PD Mode after PD negotiation fails. When VSELMIN is greater than VREQ, the associated VOUT MOS Switches are turned off. The Table 16 below shows the Non-PD Mode state of the AP33772S. Non-PD Mode State VVREQ VVSELMIN VVOUT VVREQ = 5V VVSELMIN = 5V ON VVREQ = 5V VVSELMIN ≥ 9V OFF Table 16. VOUT Voltage Status versus VVSELMIN under Non-PD Mode Temperature Estimation An external NTC Thermistor can be connected to OTP pin to measure external temperature. OTP pin is connected to constant current source internally. As temperature changes NTC resistance changes, which is measured to estimate the temperature. With the AP33772S internal ADC, OTP pin voltage is measured and the NTC resistance can be calculated. The AP33772S then estimates the temperature value based on the 4 userinput NTC resistance values (TR25, TR50, TR75 and TR100), as shown in Figure 4 below, where the “LINEAR INTERPOLATION” and “LINEAR EXTRAPOLATION” are used for the inner range and outer range respectively. The estimated temperature is updated to internal register for I2C command TEMP (0x13) reading. TEMPERATURE (° C) Calculated Resistance vs. Estimated Temperature 120 0.974k 100 80 1.925k 60 4.161k 40 10.000k 20 0 0 5 10 15 20 RESISTANCE (kΩ) Figure 4. Calculated Resistance vs. Estimated Temperature Plot (RED Dot Shows Default Setting Values) AP33772S Document number: DS46176 Rev. 10 - 2 14 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) Temperature Estimation (continued) The host MCU must initialize the TR25, TR50, TR75 and TR100 registers before reading TEMP register or enabling OTP protection and power derating functions. Otherwise, the Murata NTC NCP03XH103 4-point data as Table 17 below are used as default. The user can change the default 4point data through I2C commands: TR25 (0x0C), TR50 (0x0D), TR75 (0x0E) and TR100 (0x0F), if a different NTC make is chosen. Register Default Value NTC Resistance (kΩ) Temperature (°C) TR25 2710h 10 25 TR50 1041h 4.161 50 TR75 0788h 1.928 75 TR100 03CEh 0.974 100 Table 17. The 4-Point NTC Resistances and Temperatures Are Used as Default in AP33772S Data Role Swap function (Function only for AP33772SDKZ-13-FA02) DRSWP_EN bit of register PDGONFIG can set 1 to accept Data Role Swap from Port Partner and set 0 to reject Data Role Swap from Port Partner. Default value of DRSWP_EN bit of register PDGONFIG is 0. Current Port Data Role can be read in the DATARL bit of register OPMODE Write 1 DRSWP bit of register PD_CMDMSG to send Data Role Swap information to Port Partner PD_CMDMSG Bit Attribute Pwr-On — 7:4 WO 0h Reserved Description — 3 WO 0h Reserved — 2 WO 0h Reserved DRSWP 1 WO 0h 1: Issue DR_Swap command HRST 0 WO 0h 1: Issue Hard Reset command Table 18. The PD_CMDMSG Command AP33772S Document number: DS46176 Rev. 10 - 2 15 of 21 www.diodes.com August 2026 © 2026 Copyright Diodes Incorporated. All Rights Reserved. AP33772S Functional Description (continued) I2C Command Set Summary The I2C commands used in the AP33772S are listed in Table 19 below. Command Length Pwr-On Description STATUS MASK OPMODE CONFIG PDCONFIG SYSTEM TR25 TR50 TR75 TR100 VOLTAGE CURRENT Register 0x01 0x02 0x03 0x04 0x05 0x06 0x0C 0x0D 0x0E 0x0F 0x11 0x12 1 1 1 1 1 1 2 2 2 2 2 1 00h 03h 00h F8h 03h 10h 2710h 1041h 0788h 03CEh 0000h 00h Status Interrupt enable mask Operation mode System configuration options PD mode configuration options System control and information Thermal Resistance @25°C, Unit: Ω Thermal Resistance @50°C, Unit: Ω Thermal Resistance @75°C, Unit: Ω Thermal Resistance @100°C, Unit: Ω The VOUT Voltage, LSB 80mV The VOUT Current, LSB 24mA TEMP 0x13 1 19h Temperature, Unit: °C The default value is 19h (25°C). VREQ 0x14 2 0000h The latest requested voltage negotiated with the source, LSB 50mV IREQ 0x15 2 0000h The latest requested current negotiated with the source, LSB 10mA VSELMIN 0x16 1 19h The Minimum Selection Voltage, LSB 200mV The default value is 19h (5000mV). UVPTHR 0